Applying voltage to the output of a voltage regulator

Thread Starter

128ITSH

Joined Jul 20, 2017
101
Hello!
I am designing an embedded system that would be normally powered from an AC to DC power supply (MYRRA 47152).
The 5V output of this supply will be regulated down to 3.3V by an LDO regulator (MCP1825ST-3302E/DB).
When I want to program the MCU, I don't want to actually use high ac voltage to power it, but rather supply 3.3V from an external regulator.
My question is, does the regulator care if it has 3.3V applied between its output and ground while its input is not active (i.e. disconnected or 0V).
To better explain the situation there's a schematic:
regulator.png
So can the regulator get damaged from this voltage?
 

Thread Starter

128ITSH

Joined Jul 20, 2017
101
hi 128,
The usual method is to connect a diode in parallel, so the Vreg will have only 0.7v reverse voltage, when the Vout exceeds the Vin.
E
Thank you! I always wondered what is the purpose of this diode and now I understand. This looks like a great method for my application.
 

ericgibbs

Joined Jan 29, 2010
21,439
hi,
In most Vreg circuits, where large Vin and Vout caps are used, at power Off the Vout can exceed Vin, so the diode is fitted to prevent reverse voltage damage to the Vreg.
E
 
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