Hello
I am doing my final year project, multi-loop pll frequency synthesizer. I want to use an amplifier after the loop filter in oder to compensate the division ration in the feedback loop. The problem I have realised is that I want to have a gain of 60 using an op. amp. with a supply of +15 and -15 Vcc however, if I have this gain and this voltage supply my signal is likely to go all the way up to 15 V and the VCO IN in to the VCO of a 74HC4046 is equal to the Vcc therefore I could damage the IC. One thing I am going to try is to decrease the amplitude of the reference signal to see if the amplitude of the pulses at the output decreases when the amplitude of the reference signal decreases, if this is the case I think I could work with this but if it does not decrease I have to try to look for another way of achieving this amplification. Does anyone have a suggestion?
Thank you,
Best regards,
Francis
I am doing my final year project, multi-loop pll frequency synthesizer. I want to use an amplifier after the loop filter in oder to compensate the division ration in the feedback loop. The problem I have realised is that I want to have a gain of 60 using an op. amp. with a supply of +15 and -15 Vcc however, if I have this gain and this voltage supply my signal is likely to go all the way up to 15 V and the VCO IN in to the VCO of a 74HC4046 is equal to the Vcc therefore I could damage the IC. One thing I am going to try is to decrease the amplitude of the reference signal to see if the amplitude of the pulses at the output decreases when the amplitude of the reference signal decreases, if this is the case I think I could work with this but if it does not decrease I have to try to look for another way of achieving this amplification. Does anyone have a suggestion?
Thank you,
Best regards,
Francis
