SPISettings SPI_Settings_Test_14(5000000, MSBFIRST, SPI_MODE3);

void setup() {
   
     Serial.begin(115200);

}

void loop() {

                   // SPI ACTIVED
                    SPI.begin();

                    // BUS SPI ACTIVED
                    SPI.beginTransaction(SPI_Settings_Test_14);

                    //  SLAVE ACTIVED
                    digitalWrite(FPGA_CS_VOLT_NEG, LOW);

                    SPI_Received_Value_BATT_480_VOLT = SPI.transfer16(0);

                    // SLAVE DISABLED
                    digitalWrite(FPGA_CS_VOLT_NEG, HIGH);

                    Serial.println(SPI_Received_Value_BATT_480_VOLT, BIN);

                    // BUS SPI DISABLED
                    SPI.endTransaction();

                    // SPI
                    SPI.end();


                    float Voltage = SPI_Received_Value_BATT_480_VOLT * (5.2/4096);
}

// SEND DATA -- CHANNEL VALUE

                    // ABILITO LA COMUNICAZIIONE SPI
                    SPI.begin();

                    // ABILITO IL BUS SPI
                    SPI.beginTransaction(SPI_Settings_Test_14);

                    // ATTIVO LO SLAVE
                    digitalWrite(FPGA_CS_VOLT_NEG, LOW);

                    SPI.transfer16(001000000000000); pag 17

                    // DISATTIVO LO SLAVE
                    digitalWrite(FPGA_CS_VOLT_NEG, HIGH);

                    SPI.endTransaction();

                    SPI.end();

Hello everyone

I have to use ADC AD7921.
It is manageable through the SPI device. It is equipped with two analog inputs that can be selected by manipulating a MUX, through SPI.

By default, the Vin0 signal is enabled on the exit from the MUX, which I read correctly with the code I attach.

One thing I noticed is that if I decrease the freq I read incorrect values, and this thing is not clear to me since on the datasheet, p. 7, I find a Freq rage from 10 khz to 5 Mhz. What am I wrong?

Further, he goes to sample in and out on the fall.

On my uC which is a SAMD21 I selected mode 3.

The data that he sends me I receive correctly with mode 3 because, even looking at the time digram, page 7, he samples the DOUT on the falling and I on the uC I read it on the first positive front.

But instead when I send from the uC, always with mode 3, they field on the FALLING and also the ADC on the DIN samples on the FALLING. Could that be the problem?

I attach the code separately to send the channel value.

A further thing is that by looking at the time diagram on page 8 it can be seen that it requires 16 clock strokes to carry out all the communication; how do i get exactly this number of clock hits?
Mod edit: translate last line. JohnInTX



Thank you

 

One thing I noticed is that if I decrease the freq I read incorrect values, and this thing is not clear to me since on the datasheet, p. 7, I find a Freq rage from 10 khz to 5 Mhz. What am I wrong?

That is the specifiction but the SPI clock is also the conversion clock. A slower clock for the successive approximation ADC can increase the error as the holding capacitor will discharge over time, increasing error.

The data that he sends me I receive correctly with mode 3 because, even looking at the time digram, page 7, he samples the DOUT on the falling and I on the uC I read it on the first positive front.
But instead when I send from the uC, always with mode 3, they field on the FALLING and also the ADC on the DIN samples on the FALLING. Could that be the problem?

It looks like mode 3 to me, too. Clock is normally high and the data sampling is on the falling edge.

A further thing is that by looking at the time diagram on page 8 it can be seen that it requires 16 clock strokes to carry out all the communication; how do i get exactly this number of clock hits?

That should be controlled by the hardware SPI peripheral. 2 bytes = 16bits.

I attach the code separately to send the channel value.
SPI.transfer16(001000000000000); pag 17

I note that there are only 15 bits specified in your channel setup. That may be a problem. You are also not storing the return value.

Be sure you have access to a scope or SPI analyser for this sort of thing. Analog Devices can have 'interesting' variations in their serial interfaces, SPI and I2C both.

Good luck!

 

It looks like mode 3 to me, too. Clock is normally high and the data sampling is on the falling edge.

hi and thank for reply.

Yes but the first situation is ADC DOUT on FALLING EDGE and uC DIN on RISING edge, the second situation is uC DOUT on FALLING edge and ADC DIN on FALLING edge.

I thought that for the second situation I should also have sampling on reversed fronts as for the first situation.

Below is the code with which to select the second channel of the ADC and with which to save the new value.

Tell me what you think.

Best regards

// ABILITO LA COMUNICAZIIONE SPI
                    SPI.begin();

                    // ATTIVO LO SLAVE
                    digitalWrite(FPGA_CS_VOLT_NEG, LOW);

                    delay(1);

                    // ABILITO IL BUS SPI
                    SPI.beginTransaction(SPI_Settings_Test_14);

                    // ATTIVO LO SLAVE
                    //digitalWrite(FPGA_CS_VOLT_NEG, LOW);

                    SPI.transfer16(0010000000000000);

                    // DISATTIVO LO SLAVE
                    digitalWrite(FPGA_CS_VOLT_NEG, HIGH);

                    SPI.endTransaction();

                    SPI.end();


                    delay(1000);
 

                    mcp5.digitalWrite(BATT_240_VOLT_CHAIN_TEST, LOW);


                    // ABILITO LA COMUNICAZIIONE SPI
                    SPI.begin();

                    // ATTIVO LO SLAVE
                    digitalWrite(FPGA_CS_VOLT_NEG, LOW);

                    delay(1);

                    // ABILITO IL BUS SPI
                    SPI.beginTransaction(SPI_Settings_Test_14);

                    // ATTIVO LO SLAVE
                    //digitalWrite(FPGA_CS_VOLT_NEG, LOW);

                    SPI_Received_Value_BATT_240_VOLT = SPI.transfer16(0);

                    // DISATTIVO LO SLAVE
                    digitalWrite(FPGA_CS_VOLT_NEG, HIGH);

                    Serial.println(SPI_Received_Value_BATT_240_VOLT, BIN);

                    // DISABILITO IL BUS SPI
                    SPI.endTransaction();

                    // DISABILITO LA COMUNICAZIIONE SPI
                    SPI.end();

 

Yes but the first situation is ADC DOUT on FALLING EDGE and uC DIN on RISING edge, the second situation is uC DOUT on FALLING edge and ADC DIN on FALLING edge.

If you look carefully at Fig 30, you will see that sampling the data on the FALLING edge is valid in both cases. The descriptions elsewhere imply that you can sample on the rising edge but only if you do it faster than t7 for DATA IN. I wouldn't do that. Again, Analog Devices has some weird ideas for many of their serial interfaces in my experience.

Below is the code with which to select the second channel of the ADC and with which to save the new value.

Can you declare a binary constant like that? Usually it is 0b0010000000000000 but I don't know your compiler or library so take that for what it's worth.

Good luck!