Let's consider any circuit which contains a differential pair, for example a telescopic cascode single stage OTA:

In every circuit like this one, my professor and every book compute the small signal differential gain by assuming a perfect differential input couple of signals. Thus, as far as regards our example, we have:

and the small signal differential gain, exploiting the symmetry (i.e. the ac grounds on the nodes on the axis of symmetry which allow me to consider just half circuit), becomes:

This procedure is general: every time we have a circuit with a differential input pair, under the hypothesis of differential input signals, we can simplify the computation of the differential gain by exploiting symmetry (half circuit).

The question now is: why do we always compute the differential gain in the particular case of differential signals as input? In the most general case, indeed, we don't have differential signals. Consider for example this basic circuit:

In every book I've read, we pretend that the gain of the op-amp is the differential gain calculated before (i.e. assuming differential input signals). In other words: in order to use the previous expression of the differential gain, we should have the following situation in which the inverting and the non-inverting terminals of the op-amp receive differential signals (in red in the following picture):

But actually those red signals are not present: indeed the non-inverting terminal is fixed to ground, whereas (assuming large differential gain) the inverting terminal is almost zero.

In conclusion: why do we always calculate, in circuits containing a differential pair, the small signal differential gain assuming perfect differential signals as input? Why do we wrongly assume that the gain found in this way is also the differential gain of op-amps used in negative feedback?

Thank you

 

Hello,

Please upload the pictures to the forum.
Direct linking to the google drive does not work.

Bertus

 

hi s1993,
As this appears to be a Homework assignment, I will move it to
the Homework Forum.
E

 

So, are you suggest the if we ground one of the input terminals of a diff amp we do not have a "differential amplifier anymore?
And what all of this has to do with an opamp? Because in circuit theory an ideal opamp amplifiers only the differences voltage between his input.





Also, what you say about this:



All we need is a KVL around the input.

And notice that Vin = Vgs1 + Vsg2 (Vsg2 = - Vgs2) . And this means that as Vgs1 increase the Vgs2 must decrease by the same amount.

 

Hi Jony130, thank you for your answer. The example you made is starting to make me understand the concept: when I have a differential pair (i.e. the input stage of an op-amp), I can always write a KVL around the input loop, as you showed.
However, you said that if Vgs1 increases, then Vgs2 must decrease by the same amount, but actually it seems to me the opposite: if Vgs1 increases, then also Vgs2 must increase. Indeed:
vin = Vgs1 - Vgs2
Suppose Vgs1 = 7 and Vgs2 = 2, then Vin = 5
Suppose now Vgs1 increases to 8; then, in order to still have Vin=5, Vgs2 should now be 3 (indeed 8-3=5). That is, Vgs2 has increased as well. This is basically due to the fact that if Vgs1 increases, then the source of the differential pair must decrease, being the gate of M1 fixed to Vin. As a consequence, also Vgs2 increases (the gate of M2 is fixed to ground and the source must drop).

 

Ok, What I meant to say is this:

For Vin = 0V we have Vgs1 = Vgs2 = 4V and Id1 = Id2 = 0.5A.

But now if Vin = 0.4V The Vgs1 will increase by around 0.2V and by the same amount (0.2V) Vgs2 must decreases.
In reality we will have:
Vgs1 = 4.18V and Vgs2 =3.78V ; Id1 = 0.696A and Id2 = 0.304A

This procedure is general: every time we have a circuit with a differential input pair, under the hypothesis of differential input signals, we can simplify the computation of the differential gain by exploiting symmetry (half circuit).

We can do this because we are putting a constant current source at the tail of a diff amplifier.

Please analyze the results of the simulation.


I hope that you recognize the small-signal model of a very basic diff-amplifier.

 

Hi Jony130, sorry for the long time.
I'm starting to understand, but still I have some doubts. You say that if vin increases of 0.4V, than vgs1 increases of 0.2V and vgs2 decreases of 0.2V. But why? I mean, you're assuming that the common source of the differential pair is a virtual ground, but in general the 0.2V of increase of both vgs1 and vgs2 is a particular case: we just have vin=vgs1-vgs2, so there are a lot of possibilities to satisfy this equation. Question: why do you assume that the common source of the differential pair is a virtual ground?
Moreover, another doubt I have is this one: if vin increases, then vgs2 increases and thus id2. Thus id1 must decrease (because id1+id2 is the tail current which is constant). Now the problem: if id1 decreases, then vgs1 should decrease, but I am violating cause-effect relationship, because vgs1 is the cause and id1 is the effect.

 

Moreover, another doubt I have is this one: if vin increases, then vgs2 increases and thus id2. Thus id1 must decrease (because id1+id2 is the tail current which is constant). Now the problem: if id1 decreases, then vgs1 should decrease, but I am violating cause-effect relationship, because vgs1 is the cause and id1 is the effect.

No - you do not violate the cause-effect relation.
The tail current is not constant because it is not an ideal current source. An increase of id2 will rise the voltage drop across the source resistance and DECREASE vgs1 (rising source potential) and - hence - also id1.

 

Hi LvW, thank you for your answer. Actually in this way no violation of cause-effect relationship occurs, and it seems to work. But then the common source of the differential pair is no more a virtual ground, as assumed instead in the calculation of the gain of the differential pair (or in any circuit which has a differential pair as input stage).

 

Question: why do you assume that the common source of the differential pair is a virtual ground?

Because we assume that we have an ideal current source at the tail.

We can try a different approach.

We can find the voltage gain for this "asymmetrical" case.

For simplicity let us analyze this circuit :


If we would have a constant current source at the tail of a diff amplifier the ideal gain will be equal to:

AV_ideal = (gm*Rd1)/2.

If you replaced Rd1 in Rd2 with a current mirror as load the gain will increase to gm*Rd1. Rd1 is an external load resistance.

But we have a resistor instead of a constant current source, hence the tail current is not constant and the voltage gain becomes:

AV = Vo1/Vin1 = (gm*Rd1)/( 2 + 1/(gm*Rss) )

As you can see as long as gm*Rss is large, we can ignore it and treat the circuit as an ideal diff amplifier, because the error caused by the finite value of a Rss resistor in a real-life situation is very small.

 

Hi LvW, thank you for your answer. Actually in this way no violation of cause-effect relationship occurs, and it seems to work. But then the common source of the differential pair is no more a virtual ground, as assumed instead in the calculation of the gain of the differential pair (or in any circuit which has a differential pair as input stage).

Yes - you are right.
HOWEVER: This is not a problem because the error we will made (while assuming virtual ground) is very small.
In detail: The common source node is at a constant potential (virtual ground for ac) only for symmetrical diff. operation with Vin1=-Vin2.
In all other cases, there is a common-mode part of the signal which causes the potential of the source node to change slightly.
Remember: SLIGHTLY.
If the common source resistance is large enough, the common mode effect will be - normally - neglected and we assume that the diff. gain is sufficiently identical to the ideal case (Vin1=-Vin2).
The resulting error is lower than all the other sources of error (finite output resistances of the transistors, no equal DC quiescent points, unequal transconuctances,...).

 

Hi! I apologize again for the long time, but I decided to study the differential pair on 3 books (Razavi, Sedra-Smith and Neamen) in order to be more prepared and to better discuss with you.
After studying on these three books, I'm starting to understand where my real problem is: negative feedback.
So, let's sum up.
If I have a differential pair like this one:

I can always split for the small signal analysis the two inputs into a pure differential couple of signals and into a common mode signal (these signals in general are functions of time) and, by virtue of the superposition principle (which holds for sure for small signals since I have a linear circuit), I can calculate the total output voltage. Since in a well-designed differential pair the differential gain (for which I can use half circuit with ac grounds on the axis of symmetry) is much greater than the common mode gain (for which I still can use half circuit with open circuits on the nodes on the axis of symmetry), its behaviour is basically differential (thus the name).
The problem which I think to have is that this kind of analysis is performed only on this single block: the differential pair. Here indeed I can apply directly the signals I want on the two gates. For example, in the following picture the author applies the dc bias voltages of 2.5V and superimposes a couple of perfect differential signals (and then also says to replace them with two identical voltage sources for the evaluation of the input common mode):


The problems that I think to have are the following:
1) Consider (again...) the following circuit:

Here I am not free of applying the signals I want: I can do it for the non-inverting terminal (which I can fix to ground or to every value I desire), but the inverting terminal is not free. Then, how to split the voltages into differential mode and common mode signals in order to apply superposition principle? It is not as easy as in the differential pair taken alone, in which the two gates were free
2) In the circuit of figure 11.11, the dc bias voltage sources are explicitely added, but in the op-amp in inverting configuration I can apply just one voltage source at the non-inverting terminal (in this particular case it is grounded, but in general I can apply a voltage source to it). How to perform a transient analysis of this circuit which proves that the inverting terminal goes to zero as well? Indeed, in every book I read, it is said that since
then

and since A0 is very large and Vout has a finite value, then Vin1 and Vin2 are almost equal (virtual short circuit).
But reading Razavi books, it seems to me that this is not the reason for which the inverting and non-inverting terminals get virtually shorted, but rather they reach the same potential thanks to the slew rate due to some parasitic capacitors which are always present.

To sum up: how to perform, in a circuit containing a differential pair with feedback, the analysis by separating the contributions of
1) dc bias (i.e. polarization)
2) differential couple of signals
3) common mode signals
in order to apply superposition principle?

Hope I was clear!
Thank you

 

But reading Razavi books, it seems to me that this is not the reason for which the inverting and non-inverting terminals get virtually shorted, but rather they reach the same potential thanks to the slew rate due to some parasitic capacitors which are always present.

For the moment, only a short answer to the quoted part of your post:
No - the slew rate has nothing to do with the principle of "virtual ground".
The reason is simply - as indicated by your last formula - that (assuming operation within the linear range of the opamps transfer characteristic) a very small diff. voltage (µV range) will produce a finite output voltage. Normally, during calculation of the gain characteristics with fedback, this small diff. input voltage will be assumed to be zero.

 

Maybe I'm starting to understand how differential pair works. I've read a sentence on Sedra-Smith which has (I hope) clarified all my doubts.

Sedra-Smith derives the large signal operation of the differential pair, and proves that:

In order to have linear amplification, the term involving vd^2 must be as small as possible. Under this assumption, the currents become:

from which the increment or decrement of the two currents is:

Now, this is the sentence of Sedra-Smith which has opened my mind:
"Recalling from our study of the MOSFET amplifier that a MOSFET biased at a current ID has a transconductance gm = 2ID/VOV ,
we recognize the factor (I/VOV ) as gm of each of Q1 and Q2, which are biased at ID = I/2. Now, why vid/2? Simply because vid divides equally between the two devices with vgs1=vid/2 and vgs2=−vid/2, which causes Q1 to have a current increment id and Q2 to have a
current decrement id."

Now I try to explain what I have understood.
Suppose I have a generic voltage between the two inputs (i.e. a difference vd):

This circuit could be, for example, the situation of the inverting configuration:

Both circuits have indeed a grounded terminal (the gate of M2 in the differential pair, the non-inverting terminal in the inverting configuration) and a difference voltage between the two inputs (vd in the differential pair, vx in the inverting configuration).

I apply what Sedra-Smith says: assuming vd very very small (and this is obtained through negative feedback), then my differential pair (which, I repeat, could be the input stage of the op-amp of before) becomes:

In this circuit, although we don't have a perfect differential input (we have vd between the two gates, and not a couple of perfect differential inputs), we have however that the small signals vgs1 and vgs2 are a couple of perfect differential signals (i.e. equal and opposite amplitudes). So at the end we really have differential signals!! (When I wrote this question days ago, I was not able to interpret this circuit in this way)
As a consequence, the previous circuit is equivalent to this one:

And now it is clear why the differential gain can be calculated as if I apply at the inputs two perfect differential signals (and thus I am allowed to use half circuit with ac grounds on the axis of symmetry) although in reality I don't have them (in the inverting op-amp configuration of before, I don't have actually differential signals)

I ask you if my reasoning is correct or not. Thank you!

 

For the moment, only a short answer to the quoted part of your post:
No - the slew rate has nothing to do with the principle of "virtual ground".
The reason is simply - as indicated by your last formula - that (assuming operation within the linear range of the opamps transfer characteristic) a very small diff. voltage (µV range) will produce a finite output voltage. Normally, during calculation of the gain characteristics with fedback, this small diff. input voltage will be assumed to be zero.

Yes, that's for sure correct if, as you say, we assume operation within the linear range. But looking at the characteristic of an op-amp:

who says that, when I turn on the circuit with negative feedback, the op-amp will work exactly and immediately in the linear region? At the very beginning the op-amp can have a large difference between the inverting and non-inverting terminals, and this means that the input differential stage could have a transistor which is fully off and the other transistor which is fully on. In this case (and this is what I wanted to say in the previous post) the transient of the circuit due to the slew rate (linked to some parasitic capacitors) will bring the inverting and non-inverting terminals very close to each other (virtual short circuit). The op-amp enters finally in the linear region, and only now the formula holds. Here Razavi's example with negative feedback:

 

"I ask you if my reasoning is correct or not. Thank you!"

Yes - it is "fully" correct in case of an ideal current source (which does not exist in reality) in the common source leg ; and it is "approximately" correct for practical reasons as long as the error (due to common-mode effects) is not larger than all the other error sources (transistors not symmetrical, other neglections and/or simplifications).

(For your understanding, perhaps it helps to realize that - if one input is grounded - the whole circuit resembles nothing else than a combination of a common source stage with a common gate stage. )

 

"I ask you if my reasoning is correct or not. Thank you!"

Yes - it is "fully" correct in case of an ideal current source (which does not exist in reality) in the common source leg ; and it is "approximately" correct for practical reasons as long as the error (due to common-mode effects) is not larger than all the other error sources (transistors not symmetrical, other neglections and/or simplifications).

(For your understanding, perhaps it helps to realize that - if one input is grounded - the whole circuit resembles nothing else than a combination of a common source stage with a common gate stage. )

Thank you!