555 PWM

Thread Starter

MATT838383

Joined Jul 31, 2019
144
why? ive tried with your drawing post 40 and its the same result maybe my 555 is wrong! i was trying to have an external clock! and see if it vary! sorry for disturbs
 
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crutschow

Joined Mar 14, 2008
38,510
ive tried with your drawing post 40 and its the same result maybe my 555 is wrong!
Most likely you have an error in your wiring or part's value.
i was trying to have an external clock!
Where did you get a clock frequency of 195Hz?
My simulation shows a clock frequency of ≈1.38KHz.

And why does your circuit have a 1k resistor and 10nF cap at the 741 output when mine doesn't?
As I previously mentioned, a capacitor at the 741 output can cause oscillations.

If you can't carefully follow what I say or what is on a schematic, then I'm spinning my wheels here.
 

Thread Starter

MATT838383

Joined Jul 31, 2019
144
crutschow

ok (i asume a was off topic) (i am trying with a monostable pwm method!) i have tried alone and need some explanations
the clock frequency is from a 74HC4060 with 16mhz xtal and a 4017 output of 195,3hz!
now if its possible i would like to put this frequency like reference frequency on a 555 monostable pwm(if somthing wrong just tell me) the shematic post44 is an advice from one who told me to put a 10nf between pin 5 of the 555 and ground! i have done it and there was no results! what is your opinion?
regards
 

crutschow

Joined Mar 14, 2008
38,510
is an advice from one who told me to put a 10nf between pin 5 of the 555 and ground
That advice is if there's no other connection to pin 5.
But, if you want to heed his advice, than you don't need mine.
Take your pick.

For a 195Hz clock try changing C4 to 100nF and R3 to 20k.
 
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danadak

Joined Mar 10, 2018
4,057
Here is single chip solution (pot external) that includes external clock and stable V to Duty Cycle control circuit.

Takes maybe 10 - 15 lines of code.

Board to dev on $ 10. https://www.cypress.com/documentati...oc-5lp-prototyping-kit-onboard-programmer-and

IDE ( PSOC Creator) and compiler free. https://www.cypress.com/products/psoc-creator-integrated-design-environment-ide


1587720054600.png


What is external clock frequency range ? What resolution do you need duty cycle ? 16 bits enough ?
That would mean duty cycle resolution 1 part in ~ 65,000. Note system noise would probably cut
that down to something like 1 part in 10,000, or .01%

Note right hand window, resources used versus left. Most are left for doing additional tasks.



Regards, Dana.
 
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crutschow

Joined Mar 14, 2008
38,510
After some thought I realized the LM339 circuit could be synchronized to an external pulse.
Below is the simulation of the modified circuit with a sync input.
The free running frequency of U1 should be about 5-10% lower than the sync frequency for reliable synchronization.

To allow for component tolerances you likely would have to make R1 a pot to get the desired free run frequency.

1587781555661.png
 
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