The original circuit is bad, both with a diode and without. In both cases, everything will end with the death of the transistor!
Display the power of the transistor (use the ALT key).

Indeed! The present circuit keeps the transistor on far to long, amongst other problems. But there is the positive pulse as desired, but a much greater negative pulse. You could use a bridge rectifier and capture all of that across a capacitor, but that is probably a lot more than you want. I suggest using a switching regulator IC instead of a 555, since there are ones made for exactly this sort of application, although not that high a secondary voltage. Texas Instruments has a whole lot of support software and a good number of examples on their website.
But if you want to keep on with the 555 the first thing to do is make the output pulse much narrower.At some point the energy delivered will match the energy your application needs. that should help a bit.

 

Excellent!
The transformer turns ratio is confirmed.
As you can see, removing the schottky diode allows the energy stored in the inductance of the transformer primary to be discharged, but not in a well-controlled manner. We have a huge "flyback" sort of discharge, which we don't want and the voltage would certainly fry the FET - it looks like the FET model isn't for a real device.

I have things to do. I'll try to return in a few hours.

Meantime, try some minor changes in the circuit:
-do a sim run with the load resistor reduced to 400k; plot L1 & L2 voltages

- Replace R1 with a direct connection to the supply. The simulation doesn't need it but it is useful in a real circuit provided a capacitor to ground is added at the "low" end of R1. The simulation will assume the supply rail is perfectly clean.
- Change R2 to about 40k. This will give much more OFF time for the FET, which will make it a bit easier to see where events occur through the switching cycle. This is just for simulation.
- Put some useful names on nodes so we have plots labelled things like V(load) and V(drain) instead of V(n00x), etc
Do some more plots of voltages and currents. Run for just 3 or 4 cycles so we can see fine details.

 

Just back for a quick question:

Why have you chosen 100 µH for L1? Are you hoping to use an off-the-shelf transformer, or can we play with the value?

[edit] Don't worry about ON time or power in the FET right now. We can deal with those things after the experiments I suggested have helped explain some things. It looks like the FET model you are using can handle infinite current, voltage and power, which is OK for now (but be grateful you are [edit] not actually building and testing real circuits!)

[edit again] Be sure we have a high-resolution plot of current in the FET. Run for just 2 cycles, so we get past the first too-long cycle that a 555 produces. Adjust your vertical axis so the current during the ON time of FET just fits and allow current during OFF time to get cut off, if necessary.

 

Minor change of plans, so I'm back for a bit.

Producing a 20 µs pulse through a pulse transformer is not a problem at all. It has implications for a real transformer in terms of cores and windings. I've used a 555 to drive a (bipolar transistor, if I recall) and a small toroidal transformer to generate a floating gate supply for a high-power buck converter, and the circuit was similar to what you are trying to do, just at lower output voltage.

Two major things need to be done to get what you want:
- A diode needs to be added on the secondary side so you get only the positive pulse you want. In a real circuit, the diode characteristics are important.
- The energy stored in the inductor during the ON time of the FET needs to be discharged in an orderly manner during the OFF time. If we are allowed to play with the inductances of the transformer and select the right FET, we may be able to simply deliberately allow the FET to avalanche (the body diode acts as a "zener"; some FETs are well-specified for repetitive avalanche energy) to discharge the inductance. If we can't let the FET handle the energy, we need an extra part or two. No real FET would actually survive those 7 kV spikes on the drain, but a real FET wouldn't permit them.

Have a look through your model library to see if you have a model, complete with all the capacitances, channel resistance, voltage limitations, etc. for an actual IRF9130. If you don't have one, have a look on the web for one. Also have a look for a model for a P-channel rated for 2 or 3 or more amps and 200 to 500 volts. No need to spend a lot of time on this right now, we can get to it after your previous "assignments."

Does everyone see the character between the square brackets as Greek character mu? [µ]

 

I'm putting this in here now because I have a time window.

When you apply a voltage across the primary of a transformer, two things happen with regard to current.
Let's assume to start that there has been no current through the transformer for awhile so no stored energy, and that we are going to apply a fast-rising voltage, just as the circuit under consideration does. We'll assume perfect coupling in the transformer and no resistance in the winding or FET.

Current will instantly rise to a level dictated by the load resistance and the turns ratio of the transformer. For the transformer in question, with a turns ratio of 83, the primary current will be 83*(1000/4 000 000) = about 21 mA. Driving the load takes very little current in the primary.

But we also have to charge the inductances. We'll ignore the secondary for the moment, and just consider the primary.
At the instant the voltage is turned on, the current due to inductance must be zero - you can't instantaneously change the current though an inductor. It will begin to rise linearly according to
di = (V*dt)/L (the d's should be lower case Greek delta, indicating differential)
For our 100 µH primary and 12 volts and taking the ON time as 20 µs
di = (12 V * 20 µs) / 100 µH = 2.4 A

Yup, 2.4 amps peak (1.2 A average during the ON time, since it started at zero and ramped up to 2.4 A) to charge the inductor and not contribute anything useful to the load! We can't really see this clearly on the current plots available as I write this, but it looks to be in the ballpark.

How much energy is this?
E = (L * i^2)/2 = (100 µH * 2.4 A ^2)/2 = 100e-6 x 5.76 x 0.5 = 288 microjoules
(energy in joules, current in amperes, inductance in Henries)

For comparison, during the ON time we put into the load:
(1000V ^2 / 4 000 000 ohms) * 20e-6 seconds = 5e-6 Watt·seconds = 5 microjoules

Eee! That's rather inefficient, considering we will waste the 288 microjoules and use only 5.
(I mentioned previously that some power FETs are rated for repetitive avalanche energy, which is usually specified in ... microjoules!)

Let's return to the secondary to see if it was OK to ignore it:
Here the peak current in the secondary inductance has been limited by the load resistor to
1 kV / 4 megohms = 0.000 25 A.
0.00025 A ^2 * 700 mH * 0.5 = about 0.022 microjoules, about 13 000 times less than the primary stored energy, so it is OK to ignore it
(lots of times in calc's in electronics considerable simplification results from assuming something can be ignored, but you do need to be confident of your assumption, which sometimes means more calculations)

We can improve the unwanted stored energy problem substantially.

 

p75213 - are you still interested in this? It is possible to do what you want and we're getting close.

 

p75213 - are you still interested in this? It is possible to do what you want and we're getting close.

It was starting to get bigger than Ben Hur and somewhat confusing and time consuming.

 

I've been doing some reading and it seems the schematic I posted is pretty much a flyback transformer (as ebp noted). A flyback transformer has an air gap which stores the magnetic field and prevents the core saturating as a result of the square wave dc current. The saturation happens because there is no reverse current to reverse the magnetic domains. When the core is saturated the inductance will drop and the only resistance is that of the windings and therefore you get an increased current. So it seems a ferrite core specifically for a flyback transformer may go somewhere to fixing the problem, although I'm not sure how you would tell Spidce.

I've also discovered if I include a capacitor in the circuit it will filter out the dc and convert it to ac (the capacitor charges on the pulse and discharges on the pulse off). However I'm not sure weather this should be in series or parallel (series I think) and also how to calculate the cap size. Doing this should result in an ordinary transformer (not flyback).