help please!!! I have a project to make this schematic but i'm a little stuck......any advice/help would be GREAT! I'm using Xilinx or tkgate to do this....

1a
Design a 4-to-1 multiplexor with a 2-bit selector.

1b
Using the design from 1.1a, build a 4-to-1 multiplexor that uses 8-bit buses instead of the single bits in 1.1a.

thanks!!!

 

Originally posted by rj2222@Sep 16 2005, 03:44 PM
help please!!! I have a project to make this schematic but i'm a little stuck......any advice/help would be GREAT! I'm using Xilinx or tkgate to do this....

1a
Design a 4-to-1 multiplexor with a 2-bit selector.

1b
Using the design from 1.1a, build a 4-to-1 multiplexor that uses 8-bit buses instead of the single bits in 1.1a.

thanks!!!

[post=10384]Quoted post[/post]​

Assuming you are using a programming language like vhdl, this can be as easy as a case selection using the following type of architecture.

inputs d0-d3, s0-s1
when s0,s1 = 00 then output = d0
when s0,s1 = 01 then output = d1


- Good Luck