1. learnfromfailures

    Xilinx FPGA decoupling cap layout (traces and vias)

    I have the decoupling capacitors located close to Spartan 7 (<2000 mil). I'm trying to route these and connect it to the BGA pin. According to xilinx UG393, I shouldn't use same vias. PCB layout engineers often try to squeeze more parts into a small area by sharing vias among multiple...
  2. J

    Noise reduction connecting PCB to USB

    Hi! After producing multiple different PCB designs of a board for controlling a stepper motor, I noticed something that I cannot explain. The boards are in general powered through 12 volts, then a voltage regulator brings the voltage from 12 to 5 V and another one from 5 to 3.3 V. Stepper...
  3. S

    CDN distorting the wave form too much

    Hi! I've built a CDN (Coupling/decoupling network) and when connecting it to a Surge generator the wave form gets a little distorted, the fall time becomes half of what the Surge pulse produces. I'm new to designing circuits and am not really sure what components to tweak and how. The image...
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