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#1
05-17-2009, 12:06 AM
 ferrero New Member Join Date: May 2009 Posts: 5

Hi guys... new here

I have a problem with the following and hope all the gurus here can help me out on this

Consider a transmission system using Cyclic Redundancy Check (CRC) technique with a
generator polynomial

100111011000.
(a) Draw a digital logic circuit for a shift register implementation of CRC.
[8 marks]

(b) Use the logic to evaluate the received bit pattern to see whether the bit pattern
is error-free.
[12 marks]

thank!
#2
05-17-2009, 12:10 AM
 hgmjr Super Moderator Join Date: Jan 2005 Location: Tennessee, USA (GMT-6) Posts: 9,030 Blog Entries: 11

There are a number of very good articles on the Internet that present a solution that uses gates. Here is a pretty thorough article on CRC that covers the subject.

hgmjr
#3
05-17-2009, 01:11 AM
 ferrero New Member Join Date: May 2009 Posts: 5

so base on that article 10101 = 1*x0 + 0*x1 + 1*x2 + 0*x3 +1*x4

therefore = 1 + x2 + x4

but is the circuit like this?

A<---B + C<---D +

Last edited by ferrero; 05-17-2009 at 01:24 AM.
#4
05-17-2009, 01:25 AM
 ferrero New Member Join Date: May 2009 Posts: 5

Please help to see if this is correct becoz the 12 mark question is ok for me... juz need to get the circuit right... pls?
#5
05-17-2009, 01:39 AM
 hgmjr Super Moderator Join Date: Jan 2005 Location: Tennessee, USA (GMT-6) Posts: 9,030 Blog Entries: 11

Go ahead and take a stab at drawing up the CRC circuit and post it here. We can then make suggestions on what you need to adjust should a correction be needed.

hgmjr
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#6
05-17-2009, 02:10 AM
 hgmjr Super Moderator Join Date: Jan 2005 Location: Tennessee, USA (GMT-6) Posts: 9,030 Blog Entries: 11

Did you use the "MANAGE ATTACHMENTS" button to attach your diagram?

hgmjr
#7
05-17-2009, 02:16 AM
 ferrero New Member Join Date: May 2009 Posts: 5

here you go...
Attached Images
 tutorial.JPG (13.8 KB, 62 views)
#8
05-17-2009, 02:30 AM
 hgmjr Super Moderator Join Date: Jan 2005 Location: Tennessee, USA (GMT-6) Posts: 9,030 Blog Entries: 11

I would imagine that you would need 5 stages rather that just 4, since there are five bits in your CRC term.

hgmjr
#9
05-17-2009, 02:57 AM
 ferrero New Member Join Date: May 2009 Posts: 5

i look at my coure notes and they only have A B C D for 5 bit 11001

and this is how they drew it

can you kindly enlighten me directly??... i am really confused now

thanks...
Attached Images
 example.JPG (10.7 KB, 51 views)
#10
05-17-2009, 03:19 AM
 hgmjr Super Moderator Join Date: Jan 2005 Location: Tennessee, USA (GMT-6) Posts: 9,030 Blog Entries: 11

I stand corrected.

You wrote the correct equation in your earlier post.

I am used to the flow shown like the article that I linked you to earlier.

One thing for sure, your vertical arrows should be pointing into the circled + signs rather than the flip/flops.

hgmjr

 Tags crc, implementation, register, shift

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