# small signal amp experiment cont. page 2

Ok Now I've been working on the next stage, and realizing that the Zin is dropping instead of increasing, as I try to get as much gain as possible.

Probably if I were to use bypass caps. It would solve most of this but I'm trying to not have to use bypass caps. if I don't have to.

My other alternative is to start over, and make the Volt. gain. of the output stages low and begin to increase the gains as I approach the input stages,

that way I can use larger values for the emitter resistors, which will increase the Zin so I can get out of this low value Zin hole, I dug myself into.

It's amazing when you really try to work within constraints, how there is a lot more work that has to go into getting the right values, so that transistor parameters, mainly base current loading don't affect the bias of the stage.

To be cont:
------------------------------------------------------------------------------------
PAGE 2. REDESIGN with lower Av. at the output.

arbitrary chosen = #

F = 400 HZ #
Vout pk = 4V. #
VCC = 12V. = (3 x Vout pk) #
-------------------------------------------------------
Stage Q1:

VC = 6V.
ICmax pk = 100 mA. #
Vout pk = 4V. #
VC- pk-pk = 2V.-10V.
ICmin = VC of 10V. so 2V. dropped across RC = VRCmin
ICmax = VC of 2V. so 10V is dropped across RC = VRCmax. @ ICmax of 100mA.
Rout = RC1 // RL = { ( VRCmax / ICmax.)} = { (10V. / 100mA.)} = 100 ohms.
RC1 = RL = (2 x Rout) = 200 ohms.
ICQ1 = ( VC / RC) = (6 / 200) = 30mA.
RC1 = 200
Av. 2 #
RE1 = (Rout / Av.) = 51 ohms
VRE1 = 1.53V.
VRB1 = 2.23V.
RB1 = 1K ohms #
IB1 = 2.23mA
RB2 = 4.3K ohms

static test:
When I build the volt. divider, I will test 5 different transistors for that stage and if the base current loading remains close to the same with all 5 then that divider will be used in the design of that stage.

VCQ1 = 6.54V.
VEQ1 = 1.5V.
VRB1 = 2.2V.

Dynamic test:
Vin pk. = 220mV. pk.
Vout pk. = 300mV pk.
Av = 1.36
Zin = 615 ohms using 50 for Beta. calculations
Not much to be said for that stage.
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Stage Q2:

RC2 = 620 ohms
Rout = 310 ohms approx.
VCQ2 = 6V.
ICQ2 = 9.67mA
Av. = 2 #
RE2 = 150
VRE2 = 1.45V.
RB3 = 3.3K #
VRB3 = 2.15V.
IRB3 = 652uA.
RB4 = 15K

static test:
VCQ2 = 6.72
VEQ2 =1.37
VRB3 =2.06

dynamic test: (Vout at the output stageQ1)

Vin pk Q2 = 360mV pk.
Vout pk Q1 = 1V. pk.
Av. 2.77
Zin = 1987 ohms (beta = 50)
Zin going up to 2K now. That's good..
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Stage Q3: (It's time to go with a darlington pair.)

RC3 = 2K
Rout = 1K
VCQ3 = 6V.
ICQ3 = 3mA.
Av. 20 #
RE3 = 51 ohms (Rout / 20)
VRE3 = 153mV.
VRB5 = 1.353V.
(It seems like when calculating Vbe of a darlington pair need to use 1.2V for total Vbe of transistors together instead of nom.1.4V)

RB5 = 5.6K ohms #
IRB5 = 241uA.
RB6 = 44K ohms (43K + 1K) in series.

static test:
VCQ3 =6.2V.
VEQ3 =0.19V
VRB5 =1.39V.

Dynamic test:
Av. overall 50
Vin pk. = 20mV.
Vout pk. = 1V

Zin = 5K ohms (Where trans. betas x RE3 = into 100,000's so can be ignored in the calculations zin.)

To be cont: On page 3

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