continuation transistor flip flop design page 3

By adding a second (D-flip flop), to couple to the first D-flip flop makes it into a (master-slave) flip flop.
I needed to reduce the "NAND" gate pull up resistors from 470K ohms, down to 100K ohms, to keep the outputs more stable, otherwise there was false triggering, due to more components being added to this circuit, which was drawing more current.

Now here is a logic diagram of a master-slave flip flop.


1572204754968.png


It works in that, a data input is present at the 'data in' line, when the clock is on the leading edge of it's pulse, from low to high transistion, it triggers the master flip flop to switch its 'Q' output to a logic high output.

As long as the clock pulse remains high, the slave flip flop remains in it's original state, due to the inverter coupling of the clock signal, but after the clock pulse goes from high to low, this is the trailing edge of the clock pulse, then the inverter allows the clock signal to be inverted and its output goes to a logic high, thereby transfering the data output from the master output, into the slave input, which causes the slave to change states, so as to match the master side. Both outputs will be matched to eachother, by having the 'Q' side at logic high.

The inverter is used to keep the slave flip flop from coming on at the same time as the master flip flop.

On paper it works all fine and dandy, but in real design with discrete components it takes a little more finessing of the logic gating.

Here is what I had to design to make this inversion process work properly for this circuit.


1572204761555.png


And here is the completed circuit.

1572204767830.png


Here is a video demo,
"http://www.youtube.com/embed/0Wr7cZy_FXM"

of it being utilized as a Data flip flop, then by coupling the '#Q' output on the SLAVE side back to the 'DATA' input on the MASTER side, allows it to be used as a 'TOGGLE' flip flop.


Where every clock pulse, results in a change in states of the flip flop, so the flip flop toggles its output back and forth for every clock input pulse.

The outputs are the small red LED's at the top, of the picture, I had to use smaller LED's so as to conserve room on the board.

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