Hello everyone,

First post here, I'll try to detail my issue as much as possible.

So I have two FPGAs, each of them on a different card. Some pinouts communicate via a cable (with a total of 50 pins). The cable is pretty short ( 20 centimeters) and is fully Shielded.

The problem beggins when I try to use a longer cable. The new cable is 1.5 meters long and is separated in 3 parts with two high density connectors. When I measured the overall resistance, it was only 0.6 ohm (where the short cable was 0.4 ohm). So I don't think it is due to a power issues.

Also, I thought about Impedance matching, since I use some alternative signals, but this means I'll have to remodel the PCB.

So I was wondering if there are any options in the VHDL code that is meant to be used for long cable communication.

I'm sorry if it's a bit messy I tried to make it as clear as possible.
Thank in advance

 

What problem do you have ?

I'm guessing that its signal integrity on the longer cable,
I'm guessing its ribbon cable you have.

In that case, To answer my own question...

You are suffering over / undershoot,
Caused by the conductors being close to each other, and the speed of the rising / falling edge.

The answer, might be to slow the edge speeds down,
some , may be all FPGAs now,
have options to select slow / fast edge drivers,
and / or
option to change drive strength,

each or both of which will affect the edge speed.