wien bridge oscillator with PSPICE netlist

Thread Starter

dagcilibili

Joined Jan 12, 2010
2
Hello. I have a project to simulate wien bridge oscillator. I have a problem with it. The output decays although everything used in the project is ideal component. Do you have idea why it happens?

Here is the netlist i use.

OPWIEN.CIR - OPAMP WIEN-BRIDGE OSCILLATOR

* RC TUNING
R2 4 6 6366
C2 6 3 1NF IC=2V
R1 3 0 6366
C1 3 0 1NF
* NON-INVERTING OPAMP
R10 0 2 10K
R11 2 4 20K
XOP 3 2 4 OPAMP1

*
.model D1N914 D(Is=0.1p Rs=16 CJO=2p Tt=12n Bv=100 Ibv=0.1p)
*
* OPAMP MACRO MODEL, SINGLE-POLE
* connections: non-inverting input
* | inverting input
* | | output
* | | |
.SUBCKT OPAMP1 1 2 6
* INPUT IMPEDANCE
RIN 1 2 100MEG
EGAIN 3 0 1 2 10E10
ROUT 3 6 10
.ENDS
*
* ANALYSIS
.TRAN 0.05US 1000US UIC
*
* VIEW RESULTS
.PRINT TRAN V(4)
.PLOT TRAN V(4)
.PROBE
.END
For the project i started from the given circuit in
http://www.ecircuitcenter.com/Circuits/opwien/opwien.htm
the design with diodes work fine but do you know why the above circuit decays.

Thanks for your help in advance.
have nice days.
 
You've got amplitude stabilisation issues that are easily fixed in the real world by a thermistor in the feedback loop. Modelling this in PSPICE is much trickier, it might be easier to use a FET as the control element. This is all well documented on the web. Apart from how to model this in PSPICE... but take these clues and go google, you might get lucky.

This amplitude drift (it can get bigger or smaller) is caused by the slightest mismatch between the two resistors in the bridge, and it will always happen unless extra stabilisation measures are employed.

Some other oscillator designs rely on noise to kick start them, and these also cause trouble in PSPICE sims. The workaround here is to introduce a little noise spike right at the start of the simulation.
 

Ron H

Joined Apr 14, 2005
7,012
Your gain needs to be 3. R10 and R11 theoretically will give you a gain of 3, if you have an ideal op amp. Your op amp has finite gain and finite input resistance, so you will need to make (1+R11/R10)>3 by an infinitesimal amount, or the output will indeed decay. The diode/resistor network serves this purpose, but you have omitted it from your netlist.
 
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