Why have i Bus-Problem with webpack 7.1 Xilinx ?

Hello

Sorry i write und understandig very bad english.

I want make a projekt with Schematic (Webpack 7.1) not with VHDL.

I want two 8 Bit bus multiplex to 1 Bus.

How must i connect this bus?

And i search a example.

The problem can you see in my file.


best regards

MidasX

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