In the attached image I have a MOD12 down ripple counter. When I use the switch as the reset, the MOD12 works as expected, starts at 1011 and counts down to 0000, but resets to 1111, unless I throw the switch again.

I removed the switch and replaced it with a NAND gate, now the circuit counts down from 1011, 1010, 1001, 1000, & resets to 1011.

Can someone explain to me why this cirucit acts the way it does using the NAND gate?

 

The circuit keeps counting down until someone tells it to reset. If the NAND gate is absent, the count will reach 0000 and keep going down to 1111. It does not reset. It just keeps counting down.

If you add the NAND gate, it will sense the presence of the 11XX at that time and tell all the FFs to reset to the state 1011. The final count sequence will be:
1011,1010,...,0001,0000,1011 and so on.

Is that what you see happening?

 

Your right if I have the switch connected and throw the switch to reset, the count starts from 1011.

When the NAND gate is attached I expected the circuit to do as you described, go from 1011-0000, 1011. But instead the count goes 1011, 1010, 1001, 1000, then back to 1011.

I have a probe attached to the output of the NAND gate and notice that the NAND is never going LOW.

I attached the the MultiSim circuit.

 

The problem was the propagational delay of the asynchronous counter.

The trigger for the MSB FF (bit 3) to switch from 1 to 0 is when bit 2 FF switches from 0 to 1. That is, it needs to "see" the 1 on its input, and then this 1 has to run through 3 or 4 gates before the output of the MSB goes to 0.
That resulted on an output of 1111 when going from 1000 to 0111, and it triggered the NAND gate.

A solution is attached and tries to trigger the switch on the 0000 mark, but it has a D-FF in the middle to delay the trigger until the next cycle. It looks like it skips half a clock cycle, but in fact it does half a cycle on 0 and one and a half on 1011, so there shouldn't be a problem with total timing.

 

That makes sense. I was thinking it had something to do with the propagation delay. I have been staring at my timing diagrams trying to make sense of it.

We are just starting to delve into the topic of propagation delays and how after several gates it adds up.

Our instructor gave us this lab to do, starting with building the MOD16 down coutner, adding the switch to reset it to 1011 at any time, then paritally decoding it using a 2-input NAND gate, and replacing the switch output with the NAND gate output.

He told us it wouldn't work, but I couldn't understand why. Now that you have explained it I understand.

Thanks for taking the time to explain it to me and going the extra step in showing me how to correct it.

Hopefully the fog of circuit design starts to clear up soo.