# Why does VOLTAGE BUFFER reduce gain of NON-INVERTING AMP?

#### Rogare

Joined Mar 9, 2012
78
Hello! I have a non-inverting amplifier that works just as I'd like it to: a 20dB (10x) gain in voltage for a pulsed, positive signal. However, when I attach a voltage buffer, a) the gain drops, b) also becomes dependent on voltage level.

For example, if my input is 200 mV, the output is 2 V without the buffer (as expected), but 1.2 V with the buffer—a gain of 15.6 dB. For an input of 780 mV, the output is 7V—a gain of 19.1 dB.

If anyone could shed some light on a potential solution, I'd love to hear it! Thanks for reading, and my circuit specs are below.

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MY CIRCUIT:
- The input signal will range from tens of mV up to around 1.5 V. My supply voltage is about 16 V.
- This non-inverting amp design: http://www.play-hookey.com/analog/non-inverting_amplifier.html. I'm using Rz=24 Ω, Rf=820 kΩ, Rin=91 kΩ, and a LM358 op-amp.
- This voltage buffer design: http://www.circuitstoday.com/wp-content/uploads/2011/11/voltage-follower-using-transistor.png. I'm using a PN2222 transistor and RE=820 kΩ
- My load resistance is 50 Ω.

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#### bretm

Joined Feb 6, 2012
152
Your voltage buffer probably isn't high enough impedence. Use an op-amp follower between the amp stage and output stage.

Your 50 ohm load is probably parallel to emitter resistor, so it will dominate,andbuffer therefore has about 5k input impedence.

Also your Rz is not the recommended size, and your gain looks like 10x not 100x.

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#### Rogare

Joined Mar 9, 2012
78
OK, thanks for the explanation and suggestion. I'll try it out now.

(And the 100x was a typo. Fixed!)

#### crutschow

Joined Mar 14, 2008
31,490
You output voltage reduction is not due to a loss in gain, it's due to the emitter follower DC offset of about a 0.7-0.8V from base to emitter.

To minimize this offset drop you could use a complementary emitter follower such as shown in this reference (see Low Offset Follower on pages 5 & 6). For your application you can eliminate Q3 by connecting the collector of Q1 to ground, and Q4 and C1 aren't needed. Also R1 is your 50 ohm load.

The circuit only works for a plus signal voltage with just a positive supply, which I believe is all you want.

#### Rogare

Joined Mar 9, 2012
78
OK, yes, that makes sense. So, just to verify I understand you correctly, is this image what you're suggesting? (The unmarked resistor is 10 kΩ.)

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#### WBahn

Joined Mar 31, 2012
28,144
For example, if my input is 200 mV, the output is 2 V without the buffer (as expected), but 1.2 V with the buffera gain of 15.6 dB. For an input of 780 mV, the output is 7Va gain of 19.1 dB.
For future reference, the thing to note is that, in both cases, the voltage is 0.8V less than what it ideally should have been. The fact that it is constant implies a shift and the fact that it is basically one diode drop implies it might be a base-emitter drop.

If you are trying to get up to 15V across a 50Ω load then you are asking this poor 2n2222 to put out 300mA. While that is within the spec'ed range (even for the TO-92 case), 47Ω if RE is taken into account) for the maximum collector current, you need to really look at the power dissipation.

This will be a max when Vcc = 2Vload, or Vload = 8V. At that point your transistor is dissipating 8V*(8V/50Ω) or 1.28W. That is twice the rated free-air dissipation at room temperature for the TO-92 cased part.

#### Rogare

Joined Mar 9, 2012
78
I should mention the duty cycle of my pulse is about 1%, which lightens the "load" a fair bit. With this duty cycle, do you still think I'm better off with another transistor? What would you suggest? Thanks for reading.

#### WBahn

Joined Mar 31, 2012
28,144
Power-wise you should be fine. The schematic sketch you posted has the same problem as the original circuit due to the NPN input stage in the buffer. But I don't think you want that first stage at all. Go directly into the PNP stage (with a large emitter resistance) and then to the NPN output stage.

Is your opamp powered by bipolar rails? If not, you are going to have problems with small amplitude signals. Also, if you are interested in input signals that are one the order of 10mV, you probably need to look at voltage offset issues and how to deal with it.

How short are the pulses that you want to see? How square do they need to be?

#### crutschow

Joined Mar 14, 2008
31,490
I agree with WBahn. You don't want the first emitter follower stage. The purpose of the new circuit was to replace the original follower to avoid its offset problem.

And the PNP emitter resistor should be larger (also as WBahn noted) to minimize the power in the PNP. It's value depends upon the highest voltage output you want and the gain of the NPN.

Edit: If you want to maintain the output offset to below a few millivolts then you could take the op amp feedback resistor signal from the output of the buffer rather than the op amp output. That way the output buffer offset would be reduced by the open loop gain of the op amp, and would be essentially equal to the op amp offset.

On second thought, taking the feedback from the buffer output would also work with your first single transistor emitter follower circuit to make the offset essentially equal to the op amp DC offset.

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#### Rogare

Joined Mar 9, 2012
78
crutschow: That sounds like a pretty elegant solution, I like it. This image is what you had suggested?

WBahn: Thanks for the explanation. The signals are about a hundred microseconds, and no, not bipolar rails (+15V/0V). Hopefully, I won't need to go quite that low. I'll test it out in the morning to see. In terms of squareness, there's no quantitative cut-offsome degradation is OK.

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#### WBahn

Joined Mar 31, 2012
28,144
I should have thought of taking the feedback directly from the final output -- I used the same approach for the first test electronics that I designed nearly twenty years ago. Oh well. Getting old.

Do you mean that the time that the pulses are high is about 100µs and that the pulses occur at about a 100Hz rate?

I took a look at the LM358 data sheet and it seems like it might be a good choice. The bandwidth with a 10dB gain should be somewhere around 100kHz, which might be fast enough to give a reasonable shape. I couldn't find a slew rate spec.

The input common mode range includes ground, which I was a bit concerned about.

The one thing you might have an issue with is that the output voltage swing appears like it might only get within a couple volts of the positive rail. Since you need an additional diode voltage drop, this may limit your maximum pulse height to 12V or there abouts (assuming a +15V rail).

#### crutschow

Joined Mar 14, 2008
31,490
crutschow: That sounds like a pretty elegant solution, I like it. This image is what you had suggested?
..........................
Yes, that's the circuit.

#### Rogare

Joined Mar 9, 2012
78
OK, the circuit is tested and works well. Thanks for the help! Sorry I wasn't more clear about the pulse width and frequency: pulses are about a hundred microseconds wide and spaced no fewer than a few milliseconds apart.

As you predicted, WBahn, I am limited to 12 V for the 14.4 V supply, which I think is OK for now, but thanks for the pointer. (The supply is a 9V & 7660S.)

#### SgtWookie

Joined Jul 17, 2007
22,229
<snip>
On second thought, taking the feedback from the buffer output would also work with your first single transistor emitter follower circuit to make the offset essentially equal to the op amp DC offset....
... times the gain of the opamp.

The opamps' input offset (typically ~2mV for the LM358 according to National Semiconductors' datasheet: https://www.national.com/ds/LM/LM158.pdf ) is multiplied along with the input signal. If you can't tolerate that error term, you will either need to change opamps to one where you can adjust the input offset down to zero, or you'll need an opamp with a better specification for input offset.

#### Rogare

Joined Mar 9, 2012
78
OK, good to know. Thanks!

#### Rogare

Joined Mar 9, 2012
78
OK, so all was working well until I tried to boost the output higher than about 6 V.

I believe this was working fine when I first tried it, but now the output looks like a 6 V step response with a wave on top. The attached image displays both the input and output signals.

My source voltage is about 24 V, and the top of the wave gets higher as I turn up the input signal, but the bottom stays at 6 V. Any ideas on this would be terrific. Thanks for reading!

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#### crutschow

Joined Mar 14, 2008
31,490
Is the 24V powering both the op amp and the transistor collector? Can you post the complete schematic?

#### Rogare

Joined Mar 9, 2012
78
Yes, the 24 V* is powering both and I've attached a new schematic. That issue, as it turned out, was the result of my 9Vs getting low. Still not sure where the spikes were coming from (the 7660?), but I replaced the batteries and things started looking better... until I plugged in the load.

With the 50Ω load plugged in (headphone), the output voltage went from the expected level of a few V to much, much lower (~mV).
> I'm a bit fuzzy on my equivalent BJT models, but could this be the result of the load somehow reducing my feedback resistance?
> Or is my voltage source not capable of the 0–400 mA my load requires (for very short bursts of time)? I can't seem to find the max output current on the 7660 datasheet.
If so, how can I fix this? Thanks for reading, much appreciated!

*Two 9Vs in series, a 12 V rectifier (7812), and a +12 V to +/-12 V converter (7660) which I use as a 24 / 0 V source.

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#### Engr

Joined Mar 17, 2010
114
For this type of application I suggest using an op-amp as the component on the buffer stage and not the bjt? I have already tried a circuit like this but for the buffer stage I was using an op-amp.