I have about 45-50 digital lines all grouped together in a bus that I wish to enable/disable with a microcontroller. I don't need to individually enable/disable them, I just want to turn the entire bus on or off (aka connected or disconnected between input and output). I don't have enough I/O pins for that on my micro, so I was thinking about using some kind of IC that can switch a signal on and off. I am NOT looking for a mux/demux chip, or a latch, just something that has an "output enable" that I can interface with my uC. Ideally it would run on 5V, but I could probably get away with a 3-3.6V port if it has 5V-tolerant I/Os. The only chips I have found like this are 8 or 10 bits wide, and I need many more lines, without using 5+ chips. Space is somewhat of an issue.

So what are my options here?

 

I doubt that you'll do much better than 8-channel ICs. There can't be enough applications where an IC with 16+ channels are needed to make it worth creating such IC by the IC manufacturers.

Your best bet would probably be to use a PLD/FPGA device with tristate IO-pins. There are some of these devices that are flash-based (you only need to program it once) and even some that run on 5V. This would be the best solution if space is very tight.

Dare I ask why you need 50 digital lines? Why not use high speed serial links? What is your application? Often trying to force something to fit would end up costing you more in the long run than just changing the design early on.

 

Exactly, I am aware of the horrible design, but it's all I can do. Basically I am interfacing with a RAM chip via my microcontroller, but the RAM chip will also be directly interfaced to an external CPU that is "doing its own thing" while my microcontroller is working. The external CPU MUST interface with the RAM chip via parallel buses, so that's why I need so many lines. And because the RAM chip only has one address bus (input) and one data bus (output), the CPU and my uC have to share buses, and I'm dealing with 21 lines for the address and 16 lines for the data, plus some additional lines.

So basically, I need a way to cut off the entire CPU from the address and data buses of the RAM chip, so I can read/write to the RAM chip without the CPU interfering with my uC reads and writes.

I was thinking perhaps I could use some kind of high-value resistor between the CPU and each line on the bus, but that might screw up timing due to parasitic capacitance causing an RC time constant. And even then I'm not sure it would work?? So I'm looking for some way to open the connection between the RAM and CPU, and I DO have control of the lines going between them (aka they're not connected yet)