Her is the question:
the successive approximation ADC shown in Figure 6.1, the clock frequency is 1.0MHz; the comparator Threshold voltage VT = 0.1mV, the DAC has a Full Scale output of 10.23 V and a 10 bit input.. Determine:
3.4.1 the digital equivalent obtained for VA = 3.728 V;
Pic is attached
i am new to this binary stuff and i have no idea how to do it.
if the range is 10.23 V and is a 10 bit system
2^10 - 1 = 1023 steps
10.23 / 1023 = 0.01 V per step
Thats as far as i got, i dont even understand the diagram!
the successive approximation ADC shown in Figure 6.1, the clock frequency is 1.0MHz; the comparator Threshold voltage VT = 0.1mV, the DAC has a Full Scale output of 10.23 V and a 10 bit input.. Determine:
3.4.1 the digital equivalent obtained for VA = 3.728 V;
Pic is attached
i am new to this binary stuff and i have no idea how to do it.
if the range is 10.23 V and is a 10 bit system
2^10 - 1 = 1023 steps
10.23 / 1023 = 0.01 V per step
Thats as far as i got, i dont even understand the diagram!
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