waveform distortion

Thread Starter


Joined Oct 12, 2004
Hello to anyone who can help. I've been looking at a two stage transistor amp and the waveform is coming out distorted when i have the frequency too high. I have found out(by trial and error) if i change the coupling capacitor values the distortion stops but the gain drops?? :blink: Could anyone help explain this to me please. It probably is something i'm just not getting but it is annoying me.


Joined Mar 21, 2004
Hi Andythomson,

Since you said the gain droped when you changed the cap, I hope you had reduced the value of the capacitance.

As a general rule you can parallel one polyester cap with your electrolytic cap to get a good gain in the in lower and higher frequency range. And use good decoupling cap(filter cap) as close as possible to the Rcc(collector) resistor.

pls do come back with the result :)


Thread Starter


Joined Oct 12, 2004
Originally posted by mozikluv@Oct 13 2004, 02:30 AM

can you post the schem? :)
[post=2906]Quoted post[/post]​
Here is the schematic, the circuit works fine at 10Hz but at 200Hz it distorts, i think it has something to do with the capacitors and maybe the transistors??




Joined Jan 22, 2004
hi andy,

per your schem you have a gain of 5.6, but you have not mention how much drop you had when you had placed the coupling cap. was it significant? usually when you put a coupling cap it has an effect of reducing the gain but it is negligible.

if the drop is quite significant you can suspect the coupling cap or the transistor itself. try to parallel a cap of same value and see the result. if the gain improves the culprit is the cap, if no improvement check the transistor.

i will presume you have only check the waveform at the final stage. try checking the waveform at the 1st stage ouput and also after the coupling cap. :)

another thing your input Z of the 2nd stage is about 28K which is about 1:5 against your output Z. this also contributes to lower gain. equal match would drastically drop your gain by half. it's my belief and practice that Z ratio should be at least 1:10 for stable gain.

another way to stabilize gain is to split the emitter bias resistor by forming a voltage divider with a ration of at least 1:7, better at 1:10. the resistor of higher value should be the one by-passed, taking the value from your schem of 1K, the 100R should not be by-passed.

your by-pass cap value is too high in relation to your input and output cap. try to lower it say 10uf or 22uf. this also contributes to your gain stability.

another way to improve the circuit is to decouple the 1st stage having the value equal to your by-pass cap.

likewise another way to improve stability is to provide a negative feedback but for this circuit design it could not be incorporated due to 2 stage NPN configuration. the output is in-phase to your input.

hope this helps you understand your problem.