warnings are removing all my output HELP needed very badly.....

iam using HSPICE coding in mentorgraphics and simulating in ELDO....


the following is the comments after simulation and due to warning iam not able to get the o/p ports at all... please help awaiting you reply

sincerely
M.S.Chandra Sekhar



***** ANALYSIS ....

Warning 439: In file "./controller.spi" line 44:
+ COMMAND .SETBUS: last Time point ignored.
Warning 439: In file "./controller.spi" line 45:
+ COMMAND .SETBUS: last Time point ignored.

***** 0 error(s).
***** 2 warning(s).



***** GENERATION ...

Warning 107: NODE "RAS[1]": Less than two connections.
Warning 107: NODE "RAS[0]": Less than two connections.
Warning 107: NODE "CAS[1]": Less than two connections.
Warning 29: Such messages will not be displayed in future. Set .option MSGNODE
= 0 to receive all such warnings.

Warning 347: COMMAND .PRINT or .PLOT: element CONTROLLER.SDRAMCONTROLLER1.OUT_R
EFRESH not declared
Warning 347: COMMAND .PRINT or .PLOT: element CONTROLLER.SDRAMCONTROLLER1.OUT_A
CTIVE not declared
Warning 347: COMMAND .PRINT or .PLOT: element CONTROLLER.SDRAMCONTROLLER1.OUT_P
RECHARGE not declared
Warning 347: COMMAND .PRINT or .PLOT: element CONTROLLER.SDRAMCONTROLLER1.OUT_A
UTOREFRESH not declared
Warning 347: COMMAND .PRINT or .PLOT: element CONTROLLER.SDRAMCONTROLLER1.OUT_R
EAD not declared
Warning 347: COMMAND .PRINT or .PLOT: element CONTROLLER.SDRAMCONTROLLER1.OUT_W
RITE not declared
Warning 347: COMMAND .PRINT or .PLOT: element CONTROLLER.SDRAMCONTROLLER1.R0 no
t declared
Warning 347: COMMAND .PRINT or .PLOT: element CONTROLLER.SDRAMCONTROLLER1.R1 no
t declared
Warning 347: COMMAND .PRINT or .PLOT: element CONTROLLER.SDRAMCONTROLLER1.C0 no
t declared
Warning 347: COMMAND .PRINT or .PLOT: element CONTROLLER.SDRAMCONTROLLER1.C1 no
t declared

***** 0 error(s).
***** 23 warning(s).


this is the way I wrote the code....please help me I am new to this HSPICE and I followed manual properly.


.SETBUS RAS[1:0] RAS[1] RAS[0]
.SETBUS CAS[1:0] CAS[1] CAS[0]
.SIGBUS RAS[1:0] 3 0 0 0 00111111
.SIGBUS CAS[1:0] 3 0 0 0 11111111
Vreset reset VSS pattern 3 0 1n 0.1n 0.1n 10n 10111100
Vrefresh refresh VSS pattern 3 0 1n 0.1n 0.1n 10n 01001011
Venable enable VSS pattern 3 0 1n 0.1n 0.1n 10n 11110000
Vrd rd VSS pattern 3 0 1n 0.1n 0.1n 10n 00110011
Vwr wr VSS pattern 3 0 1n 0.1n 0.1n 10n 10111011
Vconflict conflict VSS pattern 3 0 1n 0.1n 0.1n 10n 10011001

V77 VSS 0 0
.tran 10n 200n 10n
.plot tran v(*)


.probe tran v(controller.sdramcontroller1.out_refresh)
.probe tran v(controller.sdramcontroller1.out_active)
.probe tran v(controller.sdramcontroller1.out_precharge)
.probe tran v(controller.sdramcontroller1.out_autorefresh)
.probe tran v(controller.sdramcontroller1.out_read)
.probe tran v(controller.sdramcontroller1.out_write)
.probe tran v(controller.sdramcontroller1.R0)
.probe tran v(controller.sdramcontroller1.R1)
.probe tran v(controller.sdramcontroller1.C0)
.probe tran v(controller.sdramcontroller1.C1)

.end