Hi,
Can anyone explain me about walking ones and walking zeros algorithm which is used in testing SDRAM.

 

Walking "1"'s and Walking "0"'s is a popular algorithm for testing all types of read/write memory not just SDRAM.

It derives its name from the pattern that is written to memory during the test. The walking "1"'s (for a byte wide memory) involves writing a binary value "00000001" into the first location in read/write memory. The value is then shifted one position to the left so that the binary value is "00000010". This value is written to the next location in memory. When the "1" is left shifted out of the 8-bit value, the value "00000001" is reused and the left-shifting begins again from there. This pattern of left-shift by one bit then writing the new value to next memory location is repeated until all of the memory is written.

Once all memory is written then the memory is read location by location and compared to the left-shifted pattern originally written.

The walking "0"'s is the same algorithm with the exception that the pattern used begins with a "11111110" written to the first memory location and "11111101" is written to the second location.

This test is intended to uncover data or address bus problems both internal to the memory device as well as external.

hgmjr

 

what is the use of walking one and zero patten in verifying the memory.

 

Apart from this thread being 8 years old, you should first read and understand the explanation in post#2 before stupidly repeating the original question.

 

what is the use of walking one and zero patten in verifying the memory.

By using the ROTATE command, you are not putting a new value directly into the mix of what value each bit should have, you are only assuming that the 1 that is rotating, will continue to exist. If you use write commands, then it is not so easy to tell whether a specific bit is accepted by the RAM or Read by the CPU correctly.


This post will likely be closed before you can respond. Start another new thread if you still have questions. This site does not like new people continuing old conversations for some unknown reason.

 

Apart from this thread being 8 years old, you should first read and understand the explanation in post#2 before stupidly repeating the original question.

my doubt is if i'm verifying the memory of depth 64 of 8bit wide then 0th location and 8th location consist of same data it may be 00000001 or 11111110 and there is chance that when i'm accessing the 8th location it may read 0th location due to the designer fault. in that case this technique will fails. is there any chances to avoid this!