Hi! Can someone help me in constructing my voltage multiplier circuit? I've been working for this the whole day and I can't figure out what's wrong with it. I tried to tweak the resistor values along the log and anti-log amplifiers to get my desired output. At first, I got it given that I have the two inputs as shown. However, by the time I changed my inputs, it won't work any longer.

 

Looks good.

You need to work on your presentation.
Problem description? Absent.
Requirements? Absent.
Constraints? Absent.

 

What were you inputs and output when it worked? (Edit: I see input=1V, input=2V, output=3V, so that's good) What did you change them to? What was the output after changing the inputs. What do you mean by "not working" Are your Op-amps powered correctly, I can't see from your schematic if you have the voltage connected backwards??? Can you probe the output of each op-amp? Make sure none of them are saturated.

Edit: Does your anti-log amp have the same gain as your log amps? What is the reason for the 148ohm resistor?

 

I used 148ohm in order to compensate with the mathematical computation that I got.

In line with this, I attached the circuit with probes at the end of each op-amps.

 

Here is the photo of my circuit, given that V1 = 3 V and V2 = 2 V. As you can see, I got Vo = 2.97 V instead of having 6 V or closer to that value.

 

The output of your summing amp looks incorrect. It should be 1.56V. It's also driving almost zero impedance. If you can substitute an ideal op-amp ( not sure you have one in your library ) that might tell you if this is causing the issue. Or, you can break the connection to the anti-log amp and see if the output gets corrected.

 

The output of your summing amp looks incorrect. It should be 1.56V. It's also driving almost zero impedance. If you can substitute an ideal op-amp ( not sure you have one in your library ) that might tell you if this is causing the issue. Or, you can break the connection to the anti-log amp and see if the output gets corrected.

U1A output is -0.556 V
U1B output is -0.535 V

U1C is inverting summing amp: -[-0.556+(-0.535)]=1.091 V
They show U1C output is 1.09 V. It matches the math.

Why would they have 1.56 V at the output of summing amp?

 

Hi! I changed the amplifier along the summing part into an ideal op-amp and then break the connection with it to the anti-log. I got the same output voltage which is 1.09V

 

shteii01 is right. I shouldn't try to add in my head without sufficient coffee. So we know the circuit is performing correctly up to the anti-log stage. What is the math you used to design the that stage?

 

Here's the pdf file I used as my reference including the mathematical equations.

 

Here are the following equations that I computed awhile ago

logarithmic:
Vo1 = -Vtln(V1/Is*R1)
Vo2 = -Vtln(V2/Is*R2)

summing:
Vo' = Vtln(V1*V2/Is^2*R^2)

where R = R1*R2 since these two resistors are equal. I evaluated them as one giving us R^2.

anti-log:
Vo = -Rf(V1*V2/Is*R^2)

inverting:
Vo = -Rf/Ra (-Rf*V1*V2/Is*R^2)

 

Your last equation should be:

v0=Rf/(R^2*Is)(V1*V2). If you make Rf=R, you get the simplified:

vo=1/(R*Is)(V1*V2).

So, in order to know if your output is correct, you must calculate the voltage you measure divided by the factor R*Is (or in your case, Rf/(R^2*Is)). So, what is the value of Is?

 

Is (V1*V2) in the denominator? And the Is that I used is the one found in the datasheet however it doesn't come up with the same answer as the simulation, how is that?

 

What datsheet? What value of Is? Where is your math?

 

I gotta run out in a minute. Show me your math and I'll look it over. Othewise, I'll check the thread when I get back.

PS: You can use your equations to calculate the outputs of each stage and compare them to your simulation. Also, make sure the vaule of Is is the same in your simulation as in the datasheet, or use the simulation value directly in your calculations.

 

I dunno how did you get your Vo for an inverting amplifier. since, the general equation of Vo of an inverting amp is (-Rf/Ra)Vin. Therefore, if you further evaluate the circuit, the Vo of my anti-log will be the Vin of my inverting amplifier. Take note that the Rfs are not equal. I guess my fault, I should have used another variable. So, instead, in the inverting amp.

Vo = (-Rf1/Ra)((-Rf*V1*V2)/IsR^2)

 

Is = 70.14 microAmperes - this is the computed value which I used in order to comply with the req.

 

OK, I missed the fact you have 3 different resistor values. But why is the sign the same before and after the inverting stage?

 

Here are my recommendations:

Make your life easy by using the same values for all resistors-simplifies the math.

Use your equations to calculate and compare the output of each stage.

Show your math so we can try to see what is the problem.

 

http://www.onsemi.com/pub_link/Collateral/1N4001-D.PDF

http://www.diodes.com/datasheets/ds28002.pdf