Vlsi testing

Thread Starter

vead

Joined Nov 24, 2011
629
VLSI chip is tested by test equipment and some test circuit

actually I am confused I don't understand that fault model and test circuit are different or same things

ac after fabrication chip are tested by automatic test equipment to reduce time of testing
suppose we made micro controllerwill we interface mirocontroller chip and test circuit on same chip like below circuit
_____________________
vlsi circuit + test circuit
______________________

________________________________
microcontroller circuit + fault model
_________________________________



or

will we use extra test circuit to test microcontroller chip
____________ __________
vlsi circuit + test circuit
___________ ____________________________
micro controller + delay fault model , stuck at fault
____________ ______________________________
 

kubeek

Joined Sep 20, 2005
5,794
actually I am confused I don't understand that fault model and test circuit are different or same things
Please use a translator to find what "model" means in your language. Model is an abstract representation of something, it focuses on only some parts of the thing that is being modelled.
A test circuit is a guide to connecting components together, that will be used to test something.
From this I hope you can see that a fault model and a test circuit are two completely different things.

As for the rest of your post, I have no idea what you are trying to ask. Please rewrite it so that someone can understand what youre asking.
 

Thread Starter

vead

Joined Nov 24, 2011
629
VLSI testing is process that is used to determine that chip is good or faulty

VLSI chip is tested by test equipment and some test circuit

can anybody tell me the example of some test circuit

just for example we made microcontroller then we can test by automatic test equipment , we use test vector to determine fault


1.test vector < microcontroller chip > output response
2.test vector <microcontroller chip +test circuit > output response
3.test vector <microcontroller chip +fault model > output response

if we want to test microcontroller chip then which process 1, 2 or 3 may be use



Q I did not understand that test circuit is built within microcontroller chip or we need extra circuit to test micro cntroller chip

Q does vlsi circuit contain fault model circuit or we use fault model to test vlsi circuit
 
Last edited:

MrCarlos

Joined Jan 2, 2010
400
Hello vead

You say:
Can anybody tell me the example of some test circuit.

An example circuit for testing VLSI would be extremely large.
It would have been faster if you investigate on Google.com for -VLSI Test Equipment-.

You say:
just for example we made microcontroller then we can test by automatic test equipment , we use test vector to determine fault.
1.test vector < microcontroller chip > output response
2.test vector <microcontroller chip +test circuit > output response
3.test vector <microcontroller chip +fault model > output response

if we want to test microcontroller chip then which process 1, 2 or 3 may be use

First of all let me ask you a few questions:
What is the intention of testing the microcontroller?
With WHAT you would test these microcontrollers?

I think the answer for the first question would be:
To make sure they comply with the specifications contained in their data sheets.
And for the second question, the answer would be:
With a test system.

Now, the test system should have at least:
A biasing circuit for the microcontroller.
A means to program the microcontroller.
Measuring or test instruments.

What You mention 1, 2, 3. 're Just methods or procedures to test the functionality of the microcontroller
Of course, against the provisions of their data sheets.

you ask:
Q I did not understand that test circuit is built within microcontroller chip or we need extra circuit to test microcontroller chip
Probably some microcontrollers have inside a self-test circuitry.
But if we want to test the microcontroller we necessarily require a test system.

Q does VLSI circuit contain fault model circuit or we use fault model to test VLSI circuit
If the specification of VLSI say it's a fault model then it has.
But if we want to test by this method or procedure, -fault model-, then we need a test system that make this method.

Your original question:
Actually I am confused I don't understand that fault model and test circuit are different or same things.
they are different things:
fault model could be a model of microprocessor with internal circuitry or a program that self-test its functionality.
test circuit is just a circuit to test the functionality of the microcontroller.

All with the intention to verify that it complies with the provisions of their data sheets.

Ask Google something like: VLSI Test Equipment.
https://www.google.com.mx/search?q=VLSI+Test+Equipment&source=lnms&sa=X&ei=YJC1U_HlKcWTqAaT74HQAw&ved=0CAcQ_AUoAA&biw=1366&bih=589&dpr=1

Sorry for so many words.
 

Thread Starter

vead

Joined Nov 24, 2011
629
Hello vead

You say:
Can anybody tell me the example of some test circuit.

An example circuit for testing VLSI would be extremely large.
It would have been faster if you investigate on Google.com for -VLSI Test Equipment-.

You say:
just for example we made microcontroller then we can test by automatic test equipment , we use test vector to determine fault.
1.test vector < microcontroller chip > output response
2.test vector <microcontroller chip +test circuit > output response
3.test vector <microcontroller chip +fault model > output response

if we want to test microcontroller chip then which process 1, 2 or 3 may be use

First of all let me ask you a few questions:
What is the intention of testing the microcontroller?
With WHAT you would test these microcontrollers?

I think the answer for the first question would be:
To make sure they comply with the specifications contained in their data sheets.
And for the second question, the answer would be:
With a test system.

Now, the test system should have at least:
A biasing circuit for the microcontroller.
A means to program the microcontroller.
Measuring or test instruments.

What You mention 1, 2, 3. 're Just methods or procedures to test the functionality of the microcontroller
Of course, against the provisions of their data sheets.

you ask:
Q I did not understand that test circuit is built within microcontroller chip or we need extra circuit to test microcontroller chip
Probably some microcontrollers have inside a self-test circuitry.
But if we want to test the microcontroller we necessarily require a test system.

Q does VLSI circuit contain fault model circuit or we use fault model to test VLSI circuit
If the specification of VLSI say it's a fault model then it has.
But if we want to test by this method or procedure, -fault model-, then we need a test system that make this method.

Your original question:
Actually I am confused I don't understand that fault model and test circuit are different or same things.
they are different things:
fault model could be a model of microprocessor with internal circuitry or a program that self-test its functionality.
test circuit is just a circuit to test the functionality of the microcontroller.

All with the intention to verify that it complies with the provisions of their data sheets.

Ask Google something like: VLSI Test Equipment.
https://www.google.com.mx/search?q=VLSI+Test+Equipment&source=lnms&sa=X&ei=YJC1U_HlKcWTqAaT74HQAw&ved=0CAcQ_AUoAA&biw=1366&bih=589&dpr=1

Sorry for so many words.
thanks for help
for example
we have NAND gate = AND gate + not gate

suppose NAND gate have stuck at fault

to determine fault we will apply test vector to nand gate we don't have need to connect any extra fault model we consider that nand gate is faulty IS this correct ?
 

MrCarlos

Joined Jan 2, 2010
400
Hello vead

You say:
suppose NAND gate have stuck at fault.
I understand that you assume that the NAND gate fails
Right?

then:
To determine fault we will apply test vector to nand gate.
We do not have any need to connect additional fault model.
We Consider That IS faulty nand gate. Is this correct?

Yes, right. but. . .
If you want to know the type of failure that has that NAND gate, need to do some tests.
If the NAND gate fails the test vector.
We can say without fear of contradiction that the NAND gate has a failure

Take a good look at the document I am attaching.
(4-NAND DM74LS00 FAIRCHILD.PDF).
You can easily make a tester to check the gate DM74LS00 meets its truth table.

But if you want to test
if the gate meets any of its parameters.
This tester would be more complex.
for example, how would you a tester to check parameters:
Propagation Delay Time: tPLH or tPHL.
which are specified in their datasheets.

If you like studying you could give it a read the document ATE.PDF that I am attaching.
 

Attachments

Thread Starter

vead

Joined Nov 24, 2011
629
thanks you MrCarlos i have little doubt about scanning and built is self test

Q1
. how can we scan vlsi circuit (boundary scan full scan partial scan )
I mean we need software tool or test equipment to scan VLSI circuit ?

Q2 when does we scan circuit after fabrication or before fabrication ?

Q2 does VLSI chip use extra self test circuit for self testability ?
 
Last edited:

kubeek

Joined Sep 20, 2005
5,794
Q1 . how can we scan vlsi circuit (boundary scan full scan partial scan )
usually that is incorporated into the jtag controller
I mean we need software tool or test equipment to scan VLSI circuit ?
depends on what you want, you could do it with external tester, or have a built-in self test
Q2 when does we scan circuit after fabrication or before fabrication ?
How do you think you could test something that is not yet made?
Q2 does VLSI chip use extra self test circuit for self testability ?
Which one? Some surely do, but definitely not all.
 

kubeek

Joined Sep 20, 2005
5,794
It really depends on what YOU design. You could design it such way that you get a chimpanzee and let him play with the buttons, if that is what you desire.

But basically there are two ways, which may even be combined together. One is to connect some external device that will perform the tests. Second is that this test equipment will somehow be present in the chip, thus performing a self test.
 

Thread Starter

vead

Joined Nov 24, 2011
629
thanks very much I have confusion
built in self test - ability of circuit to test itself
example memory bist, logic bist

scan technique used in design for testing
JTAG controller
full scan , partial scan

both scan and bist used additional test circuit for purpose of testing

I want to know how scan techniques are different from bist process
 

kubeek

Joined Sep 20, 2005
5,794
You are mixing two different things, you need a scan chain in order to be able to connect to the parts of the circuit that you need to test, and you need it for both internal (bist) and external tests. The test chain doesn´t necesarily have to cover each and every latch and gate, but in any test you need to access some of the inputs and outputs based on how deeply you test the unit.

Bist has the test vector generator and results built inside the chip, while external tester just has some way to access the inputs and outputs of the inner units, scan chains or whatever you might want to test.
Are we clearer now?
 

Thread Starter

vead

Joined Nov 24, 2011
629
You are mixing two different things, you need a scan chain in order to be able to connect to the parts of the circuit that you need to test, and you need it for both internal (bist) and external tests. The test chain doesn´t necesarily have to cover each and every latch and gate, but in any test you need to access some of the inputs and outputs based on how deeply you test the unit.

Bist has the test vector generator and results built inside the chip, while external tester just has some way to access the inputs and outputs of the inner units, scan chains or whatever you might want to test.
Are we clearer now?
built in self test - internal test
scan technique - external test


built in self test - generate its own simulation and analyze its own response

scan technique - generate test vector by software and analyze its response by tester

Am I correct ?
 

kubeek

Joined Sep 20, 2005
5,794
built in self test - internal test
scan technique - external test


built in self test - generate its own simulation and analyze its own response

scan technique - generate test vector by software and analyze its response by tester

Am I correct ?
Not at all.
Scan technique is the way you access the registers. Built in self test or external test both use the scan chain to test the device.
 
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