In the middle of a project and its time for some fresh ideas.

The basic idea, is I am trying to delay a 80 mhz, 50% duty cycle, square wave. The amplitude of this signal is -.8V to gnd, which is what the output needs to be as well. The delay is desired to be variable between 50 picoseconds to 1 nanosecond.

My first prototype is shown in the schematic attached. The circuit turns a SN65LVDS2 into a high speed comparator, then the output is clamped with a signal diode to -.8V. The input has about 5pF gate capacitance. By using a 1K precision multi-turn pot, I hoped to get the desired delay at the non-inverting terminal of the line receiver (op-amp).

This is the basic schematic, I have installed a 50ohm terminating resistor at the input to impedance match the output of the pulse source.

I have a terrible problem with output attenuation at 80mhz, as well as some pretty nasty sidelobes. Again, this is unterminated (running the signal directly into the scope).

My RF foo is not particularly well groomed, so I'm very interested in suggestions to clean such a circuit up, or even a different methodology to explore.

Line Receiver Datasheet: http://www.ti.com/lit/ds/symlink/sn65lvds2.pdf

 

Did you see the propagation delay time of the SN65LVDS2? See p.5.

 

Did you see the propagation delay time of the SN65LVDS2? See p.5.

Ron,

That was a consideration as almost everything has a systematic delay in the order of nanoseconds. The plan to alleviate this issue, along with any other delays in the rest of the circuitry, will be to tune the timing using a specific length transmission line to generate a full cycle delay (12.5ns), instigating the phase delay on top of that. Make sense?


Any other thoughts on this kind of design? This is outside my normal projects, and has me quite interested in learning how to do something like this right.

 

What is the load that delayed signal feeds?

 

What is the load that delayed signal feeds?

50Ω terminated.

Problem is the delay works, but the output looks shabby. This is a capture of the input (yellow) and output (blue).

As you can see, there is a significant amount of noise.

My next plan is to back terminate the output of the line receiver with a 50ohm thin film resistor (to ground), then hook the board up to the load and re-measure.

I didn't know if a simple impedance mis-match would cause this kind of noise or if I have bigger problems.

 

50Ω terminated.

Problem is the delay works, but the output looks shabby. This is a capture of the input (yellow) and output (blue).

As you can see, there is a significant amount of noise.

My next plan is to back terminate the output of the line receiver with a 50ohm thin film resistor (to ground), then hook the board up to the load and re-measure.

I didn't know if a simple impedance mis-match would cause this kind of noise or if I have bigger problems.

We need to see a schematic, all the way from input to output, with transmission line lengths and impedances, and all terminations (source and load).