I have just started to implement simple functions in a CPLD. The two methods of implementation I am using are schematic capture and VHDL. If I wanted to implement a full adder function using both I can do that but how can I implement different versions of the full adder e.g. Ripple and Carry Look Ahead using VHDL. I can do it in schematic capture because the circuit is quite different; however the function is the same. Can it be done in VHDL or because both functions would be the same it cannot. Thank you in advance for your time, any advice would be greatly appreciated.