Im trying to do a lab for a class and im having trouble getting started.
Here is the lab: http://fac-web.spsu.edu/ecet/dwilcox/ECET1200/Labs/Lab_11.pdf
What im having problems with is the following statement: "Use SW1 as a reset switch. Use SW2 as a
pattern pause switch. All segments are active LOW. The CLK input should be the 4 Hz CLK1 located on pin
33."
How do i put that in vhdl?
Here is the lab: http://fac-web.spsu.edu/ecet/dwilcox/ECET1200/Labs/Lab_11.pdf
What im having problems with is the following statement: "Use SW1 as a reset switch. Use SW2 as a
pattern pause switch. All segments are active LOW. The CLK input should be the 4 Hz CLK1 located on pin
33."
How do i put that in vhdl?
