Verilog compilation error when attempting to output to LED

Discussion in 'Embedded Systems and Microcontrollers' started by Obanion, Dec 26, 2009.

  1. Obanion

    Thread Starter New Member

    Nov 26, 2009
    EDIT: Figured it out. I assigned the LEDR[0] wire to the value of a register that I put in place of the LEDR[0]. I guess it makes sense since you cannot have a wire acting as a register.

    Hi guys,

    I'm trying to get this block working. I get the error:

    Code ( (Unknown Language)):
    1. Error (10137): Verilog HDL Procedural Assignment error at PWM.v(34): object "LEDR" on left-hand side of assignment must have a variable data type
    Here is the code causing the error:

    Code ( (Unknown Language)):
    2.    always @ (posedge myclock[6])
    3.         begin
    4.             if(RST)
    5.                 counter = 8'h00;
    6.             else if (counter < vc)
    7.                 begin
    8.                     LEDR[0] = 1'b1;
    9.                     counter = counter + 1;
    10.                 end
    11.             else
    12.                 begin
    13.                     LEDR[0] = 1'b0;
    14.                     counter = counter + 1;
    15.                 end
    16.             end
    I have the LED declared as an output:

    Code ( (Unknown Language)):
    1. output  [17:0] LEDR
    Any ideas why this isn't working? I tried using "assign" in front of it, but it still doesn't seem to work. I suspect it's something simple, but my Verilog skills aren't yet developed. I'd appreciate it if someone could shed some light on this issue.



    Last edited: Dec 31, 2009