verilog code for cascading 4 4-bit alu's?

Discussion in 'The Projects Forum' started by shashankm8, Jun 19, 2011.

  1. shashankm8

    Thread Starter New Member

    May 28, 2011
    hi every one,
    This week we were assigned a project to write verilog code for cascading 4 4-bit alus in order to get 16-bit output.we were comfortable writing code for 16-bit alu directly but suddenly this has disturbed our harmony.Further we were adviced to make the alu perform different operations in different clock cycles by using clk,rst inputs.And we also look forward for the suggestion regarding the use of if-else or case ( which is better to be used in the code).

    thank you,:)
  2. guitarguy12387

    Active Member

    Apr 10, 2008
    Welcome to the forums!

    Can you post your code and a more specific description of where you're stuck?