using Pspice to simulate a LC network output

Thread Starter

toyonline

Joined Nov 22, 2013
8
Hi, I'm working on designing a LC network to amplify voltage. The input of the network is a bisinusoidal waveform. I am interested in simulating output of my network.

Now, the question is, as I know, the power source in pspice is limited to sine wave, square, etc. But it does not contain a source of bisinusoidal waveform. So, I am wondering is it possible to use pspice to simulate my circuit? Is it possible to create my own power source with specific waveform?

Thank you so much.
 

Thread Starter

toyonline

Joined Nov 22, 2013
8
Perhaps you overlooked the obvious:

The second method may not work in PSpice.
That looks wonderful! Thank you so much Mike!

Since I'm a fresher in simulation, could you please explain more to me? Is that power source using an independent V source, e.g. VSRC/SOURCE? How does a polynomial variable term implemented in that source?:confused:

I think I need to move to the very basis... :)
 

MikeML

Joined Oct 2, 2009
5,444
I am not that familiar with PSpice; I used the student edition back in 1990 or so (I wasn't a student then).

LTSpice (free download at Linear.com), which I used in the examples above, has the Behavioral Voltage Source (B), where the voltage output can be any arbitrary function of time, node voltages, branch currents, etc. Attached is a partial page from LTSpice's Help File.

However, just adding the two Sinusoidal voltage sources in series will do what you need.
 

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t06afre

Joined May 11, 2009
5,934
This is a function for summing two signals like a signal from two sine sources. You can add it as symbol in LT spice. If LTspice do not have this function as a ready made symbol
Rich (BB code):
* Sum function
* Each input is added to its respective offset and then multiplied by its gain. 
* The results are then summed, multiplied by the output gain and added to the output offset:
* Z = ( (X + x_offset)*x_gain + ((Y + y_offset)*y_gain )*out_gain + out_offset
*
*
*Connections:
* X 
* | Y
* | | OUT
* | | |
.SUBCKT SUM 1 2 3 PARAMS: x_offset=0.0 y_offset=0.0 x_gain=1.0 y_gain=1.0 out_gain=1.0 out_offset=0.0
A1 [1 2] 3 sum1
.model sum1 summer(in_offset=[{x_offset} {y_offset}] in_gain=[{x_gain} {y_gain}]
+ out_gain={out_gain} out_offset={out_offset})
.ENDS SUM
 

Thread Starter

toyonline

Joined Nov 22, 2013
8
It works well! Thank you so much, t06afre. As a beginner, I must say LTSpice is more user friendly, and has more functional flexibility. Do learn a lot useful from you guys, and a lot of fun.

But I am thinking about perform more user defined/created events in LTSpice. I saw you could do that by writing some macros. So if you could tell me how to write my macros in LTSpice?:)
 

MikeML

Joined Oct 2, 2009
5,444
More like Subroutines than Macros in LTSpice. It is called Hierarchical Design using a SubCircuit. You can create a schematic of a "leaf" cell, put "Ports" on it, and then make a "Symbol" which has a one-to-one correspondence between the Pins on the Symbol and the Ports on the underlying schematic. You can do either bottom-up or top-down designs...

Now you can instantiate the symbol representing the subcell higher in a schematic tree. You can even pass values (arguments) to subcells that are different for each instantiation of the subcell ("instance attributes").

I posted an example of an LTSpice Hierarchical Schematic in posts #27, #34 and #37 of this forum thread.
 
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Thread Starter

toyonline

Joined Nov 22, 2013
8
I have read about your design on that threads. But, frankly, I dont understand. :( That was totally out of my depth.

I was more interested in your post #7 in this thread. In your simulation, you have shown a code similar at the right corner (file named with ***.net). Is it possible to use similar code to control my circuit, such as value assignment, etc.

:)

More like Subroutines than Macros in LTSpice. It is called Hierarchical Design using a SubCircuit. You can create a schematic of a "leaf" cell, put "Ports" on it, and then make a "Symbol" which has a one-to-one correspondence between the Pins on the Symbol and the Ports on the underlying schematic. You can do either bottom-up or top-down designs...

Now you can instantiate the symbol representing the subcell higher in a schematic tree. You can even pass values (arguments) to subcells that are different for each instantiation of the subcell ("instance attributes").

I posted an example of an LTSpice Hierarchical Schematic in posts #27, #34 and #37 of this forum thread.
 

MikeML

Joined Oct 2, 2009
5,444
When you create a graphical schematic in LTSpice it is stored as a text file like circuit.asc. During simulation, the graphics file gets converted into another text file (circuit.net) which is in the same form as a PSpice netlist. Most .net files created by LTSpice could likely be simulated using PSpice just as you had created the .net file using a text editor...
 

Thread Starter

toyonline

Joined Nov 22, 2013
8
Yes. That's what I want. Very useful help. Thank you Mike:)



When you create a graphical schematic in LTSpice it is stored as a text file like circuit.asc. During simulation, the graphics file gets converted into another text file (circuit.net) which is in the same form as a PSpice netlist. Most .net files created by LTSpice could likely be simulated using PSpice just as you had created the .net file using a text editor...
 
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