Using CCP on 18f series Interupt problem

Discussion in 'Embedded Systems and Microcontrollers' started by MaxHeadRoom, Jul 24, 2013.

  1. MaxHeadRoom

    Thread Starter Expert

    Jul 18, 2013
    I am using 18f2221 with 32khz clk on T1OSC.
    I want to prevent an interrupt from a pulse occurring on CCP1 (RC2) input until a ready input PB sw (RA0) is read.
    I have turned off all interrupts (that I can think of!) and set the switch to read a low.
    The problem is I cannot get the code to wait for the switch?
    The interrupt appears to be occurring regardless the state of the switch that allow the interupts-on code?
    the relevant code is here.
    Non prioritized Interrupts.
    Code ( (Unknown Language)):
    2.            ORG 0x0000
    3. ResetCode:
    4.            bra Start
    5.            ORG 0x0008
    6. HighInt:
    7.            bra    Intserv
    9. Start:        
    10.          bcf        INTCON, GIE    ;disable global interrupts
    11.          bcf        INTCON, PEIE    ;disable peripheral interrupts
    12.          bcf        PIE1, 0    ;disable timer 1 interrupts
    13.          bcf        PIE1, CCP1IE    ;disable CCP1 interrupts
    14.          bcf        PIR1, CCP1IE    ;clear CCP1 interrupt flag
    15.          clrf    flags
    16.          clrf    CCP1CON        ;CCP1 module off
    17.          movlw    b'00001010' ;tmr1 prescaler and TMR1 setup,
    18.          movwf    T1CON        ;   TMR1 off
    19.          clrf    TMR1H    ;clear timer 1 high
    20.          clrf    TMR1L    ;clear timer 1 low
    21.          movlw    b'00011111' ;port A inputs
    22.          movwf    TRISA
    23.          movlw    0x00
    24.          movwf    TRISB    ;Port B outputs.
    25.          clrf    PORTB    ;Clear port B
    26.          bsf        TRISC,    CCP1  ;CCP1 pin CCP input    
    27.  WaitSW1:
    28.          btfsc    PORTA,  0    ;wait for ready P.B.
    29.          bra        WaitSW1    ; (0x00) resets/turns off CCP.
    30.          movlw    b'00000101' ;capture on every rising edge
    31.          movwf    CCP1CON        ; CCP1 module on
    32.          bsf        INTCON, GIE    ;enable global interrupts
    33.          bsf        INTCON, PEIE    ;enable peripheral interrupts
    34.          bsf        PIE1, TMR1IE        ;enable Timer1 O.F. interrupts
    35.          bsf        PIE1, CCP1IE    ;Enable capture int
    36.          bsf        T1CON, TMR1ON    ;Turn TMR1 on    
    37.  etc etc
    So basically the problem is how to prevent the CCP1 interrupt from happening.
    Everything tried so far does not seem to work.
    Ideas welcome!
  2. JohnInTX


    Jun 26, 2012
    You did not initialize ADCON1 so RA0 is an analog input and will read 0 always, making it look like the switch is pressed.

    Also, be sure to clear any interrupt flags i.e. CCP1IF, TMR1IF before enabling their interrupts to clear out previous captures, timeouts etc.

    Finally in the interrupt service routine, if you will be dissabling/enabling interrupts while running, be sure to check the interrupt IE as well as IF before servicing so that you don't service a 'disabled' interrupt. (The interrupt flag e.g. CCP1IF is active even if the interrupt is disabled.)

    Code ( (Unknown Language)):
    1.  btfss TMR1IE
    2.  bra no_tmr1
    3.  btfss TRM1IF
    4.  bra no_tmr1
    5.  call serviceTMR1
    6. no_tmr1:
    7.  ...
    BTW, there can be problems using r-m-w on TRISC i.e. bsf TRISC,x. Load W and use MOVWF. This is especially valid if you want to use I2C.

    Have fun.
    Last edited: Jul 24, 2013
    MaxHeadRoom likes this.
  3. MaxHeadRoom

    Thread Starter Expert

    Jul 18, 2013
    Thanks for the help.
    I will post if/when everything is AOK.
  4. MaxHeadRoom

    Thread Starter Expert

    Jul 18, 2013
    By George I think I have it!! :cool:
    ADCON0 & ADCON1 set.
    Thanks again.
    JohnInTX likes this.