Hi,
We are thinking of using UART interface in slightly non-standard way. The driver to the UART Rx is always the master and there is no two way communication between the master and the slave UART.
1. Can this communication link be made deterministic. I mean for a given Baud rate and UART SYS CLK frequency, can we guarantee a 0% error rate.
2. Is there a way to calculate the probability of an error? What factors does the error depend on?
3. How can we estimate probability of frame errors, overrun errors etc?
Appreciate any feedback. Thank you.
Plant.
We are thinking of using UART interface in slightly non-standard way. The driver to the UART Rx is always the master and there is no two way communication between the master and the slave UART.
1. Can this communication link be made deterministic. I mean for a given Baud rate and UART SYS CLK frequency, can we guarantee a 0% error rate.
2. Is there a way to calculate the probability of an error? What factors does the error depend on?
3. How can we estimate probability of frame errors, overrun errors etc?
Appreciate any feedback. Thank you.
Plant.