hiii,

can any 1 tell me the difference between UART Masked Interrupt Status and UART Raw Interrupt Status reg.

which one exactly implimented in my isr to chek status value of the corresponding interrupt

i am using lm3s600 cortex m3 on kieluv4


thanx

 

I cannot give a precise answer because I am not that familiar with the part. However all processor's with interrupts have "interrupt enable" bits or "interrupt mask" bits. The idea of these bits is to allow the programmer to process or ignore different interrupts at different points in a program.

So the raw interrupt status tells you if there is an interrupt pending regardless of the state of the "interrupt enable" or "interrupt mask" bit. The masked interrupt status tells you there is an interrupt only if the "enable" or "mask" bit is in the appropriate state.

Does that answer your question?