TX clock conflict while interfacing AVR32 and DP83848C PHY

Discussion in 'Embedded Systems and Microcontrollers' started by cobrasv, Jan 7, 2011.

  1. cobrasv

    Thread Starter New Member

    Jan 4, 2011

    I was doing the interfacing of AVR32 uC with a PHY chip (DP83848C) in MII mode. I realised that the TX_CLK pin (transmit data is clocked out on this signal) is marked as an output pin on both uC and PHY datasheets... How can this be possible as the 2 pins are connected together in MII?

    ps. I am not allowed to use RMII for my application