tri-state buffer

Thread Starter

zulfi100

Joined Jun 7, 2012
656
Hi,
Can some body plz guide me with the following question:

When the control line in tri-state buffer is high the buffer work similar to which gate?
I know about the G input and V0 output but i dont know about the control line. If G is High, V0 is either 0 or 1. In this situation we cant say its behaviour is similar to which gate? If G is Low, V0 is open.

Zulfi.
 

Ron H

Joined Apr 14, 2005
7,063
Hi,
Can some body plz guide me with the following question:



I know about the G input and V0 output but i dont know about the control line. If G is High, V0 is either 0 or 1. In this situation we cant say its behaviour is similar to which gate? If G is Low, V0 is open.

Zulfi.
Tri-state buffers are available with either active high or active low enable (control). Which one are you talking about?
 

WBahn

Joined Mar 31, 2012
29,979
Make a truth table for your input and output under the condition that the control signal is HI. That matches the truth table for what gate?
 

Thread Starter

zulfi100

Joined Jun 7, 2012
656
Vi G V0
L L Open
H L Open
L H L
H H H

If Vi is the input then its same like output. Its a buffer. So its not similar to any gate (Correct?). What is G here?

Zulfi.
 

WBahn

Joined Mar 31, 2012
29,979
Vi G V0
L L Open
H L Open
L H L
H H H

If Vi is the input then its same like output. Its a buffer. So its not similar to any gate (Correct?). What is G here?

Zulfi.
Since they are specifying that G is HI, the truth table is reduced to just those rows in which G is HI. Then, because all of the surviving rows have G in the same state, the entire column can be removed and just a note placed near the table indicating that it is for the case when G is HI.

You are correct that the result is the same as a buffer, but a buffer is a logic gate just like an inverter is. It's just not a very interesting one from a logic standpoint -- but it is often a very important one from the standpoint of getting a design on paper to work in the real world.
 

Thread Starter

zulfi100

Joined Jun 7, 2012
656
Hi,
Thanks for all of you for helping me.
I have IE9. Its closing.

Book (Digital principles and application, 5th edition, page=11) says its the buffer but the answer (which is another book) says that its a 'NOT gate".

However on the same page book says that TRI-state inverter is a NOT circuit.

This means both TRI-STATE- Buffer and TRI-STATE-Inverter are not gates (confusing?) . Is it correct?

Zulfi.
 

ScottWang

Joined Aug 23, 2012
7,397
This means both TRI-STATE- Buffer and TRI-STATE-Inverter are not gates (confusing?) . Is it correct?
TRI-STATE-Buffer -- It is a Buffer, but not an Inverter.
TRI-STATE-Inverter -- It is a Buffer, and it is also a Not Gate.

You can play the logic gates at here .

And you can see the internal structure at here.
 

WBahn

Joined Mar 31, 2012
29,979
Hi,
Thanks for all of you for helping me.
I have IE9. Its closing.

Book (Digital principles and application, 5th edition, page=11) says its the buffer but the answer (which is another book) says that its a 'NOT gate".

However on the same page book says that TRI-state inverter is a NOT circuit.

This means both TRI-STATE- Buffer and TRI-STATE-Inverter are not gates (confusing?) . Is it correct?

Zulfi.
When enabled, a tri-state buffer is a buffer.

When enabled, a tri-state inverter is an inverter.

The names were not picked at random.
 
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