Ok, I got Thor's MOSFET switching today, albeit very slowly. Here is what I came up with for a simple driver circuit:

there IS a 2.2KΩ base resistor on the NTE2343; I just forgot to draw it,

PWM is 5V 500Hz, 50% duty cycle, coming from my arduino. I generate an inverse PWM waveform with the comparator. When the upper (PNP darlington) is on, the lower (NPN darlington) is off, and vise versa. This allows 12V to come in and charge the gate, then go out.

here are my 5V complementary signals to the 2 darlingtons:

Here is the output of the darlingtons (the 12V MOSFET drive signal):

Here is output of a IRFP064N (Qg = 170nC) being driven by my driver circuit. Seems to have a decent wave form.

Here is the output of Thor's MOSFET (Qg = 1710nC) being driven by my driver circuit: Really pitiful turn-on time.

This is running @ 500Hz. I plan to run at 20Khz. If I don't improve my driver circuit before going to 20KHz, the FET will never even reach full ON. What can I do to improve this circuit? I thought this would be superior to the commercial driver ICs, but I guess not. According to my math it should be able to source & sink 5A, which should switch the FET on/off in 342nS, so I don't get why its talking so long to switch. I currently have jumper wires from my breadboard to the gate of the FET, maybe that's the problem. I'm also not using the "Kelvin source" terminal.

Once I figured out that what I have made here is called a "totem pole", started googling that and what I found looks like this :

They have the NPN and the PNP reversed compared to mine, and they aren't using a seperate inverted signal like I am. How does that work?

 

You're having so much trouble because you're using the transistors as saturated switches instead of emitter followers, and you are turning both transistors on at the same time. (Don't believe me? Look at the emitter current for the NTE2343; you'll probably see ~500mA.)

You're going to have a hard time if you insist on using the transistors as saturated switches. Once they turn ON, it'll be hard to get them to turn OFF quickly.

You'll have a much easier time of it to just use a dedicated gate driver IC.

 

ah phooey. I'll place my order now. Thanks again SGT

 

I AM ordering a dedicated driver IC, but my brain won't move on until I understand this totem pole emitter follower thing. In the diagram at the bottom of post #1 shows the usual and correct way to do this, but it makes no sense to me. If you applied the same PWM signal to both transistors as they show, would you not turn on both transistors at the same time? And how does it work without a base resistor? and why are they using a high side switch on the low side and a low side switch on the high side?

 

You're trying to use the transistors as common emitter saturated switches.
They're showing the transistors used as common collector emitter followers.

When you use transistors as saturated switches, you can get the Vce very low, but it can take a LONG time to get the transistor to recover from being deeply saturated.

If you use a transistor as an emitter follower, you wind up with a voltage drop from the base to the emitter, but since the transistor never enters saturation, it responds much more rapidly - there is no 'recovery' from a saturated state.

I'll throw a simulation together for you.

 

OK, here you go; see the attached. "In" is a 50kHz 50% duty cycle nearly-square wave.

Your circuit (with the base drive inversion corrected; the comparator is no longer needed though) is on the left, a totem-pole emitter follower on the right.

It was necessary to use a common emitter front-end to get the required gate voltage swing; otherwise a logic-level input would have only raised the gate to ~4.3v, even if the logic went all the way to 5v.

Notice that Gm1, the gate signal for your driver is nearly a triangle wave. The gate signal for Gm2 is nearly a square wave.

 

When you use transistors as saturated switches, you can get the Vce very low, but it can take a LONG time to get the transistor to recover from being deeply saturated.

He mentioned they are Darlington transistors as well, which means significant (1.2 V?) Vce, right? Could that be making performance even worse than if they were single BJTs?

 

He mentioned they are Darlington transistors as well, which means significant (1.2 V?) Vce, right? Could that be making performance even worse than if they were single BJTs?

The TIP42 is not a Darlington, but the NTE2343 is (the TIP142 is not exactly the same as an NTE2343, but "good enough" for what I was trying to show.)

Darlingtons have very low bandwidth compared to a standard BJT. The Vce(sat) varies, but with a light load, it'll go as low as ~0.63v. It's the Vbe that's doubled over a standard bjt, as there are essentially two base-emitter junctions in series.

The Sziklai pair has a lower Vbe than a Darlington does, with a similar gain.
http://en.wikipedia.org/wiki/Sziklai_pair
Sziklai pairs use both a PNP and NPN transistors, instead of two of one kind as a Darlington does.

 

Ok so Q3 is an upside down PNP and the emitters of Q3 & Q4 are tied together? and when voltage is applied to the bases of Q3 and Q4 (Q5 OFF), Q4 conducts and charges the gate capacitance and Q3 does not conduct, keeping the charge in? then when voltage is removed from the bases of Q3 & Q4 (Q5 OFF), Q3 conducts and allows the gate charge to bleed out?
I thought a transistor (NPN or PNP) needed current at it's base to conduct.

When a PNP is used upside down, it acts like a NPN except it conducts with no current at the base, and does not conduct when current is at the base?

 

I could add some comments here, but expect the Sgt. will presently do something much better (and faster) than I could.

For the moment it will suffice to say that complementary symmetry followers definitely do work.

And the transistors conduct just as other emitter followers do, drawing base currents... just not simultaneously.

 

complementary symmetry followers definitely do work.

No doubt it works, I know it does. I just don't understand why.

 

Ok so Q3 is an upside down PNP

Q3 is indeed a PNP, but upside-down? Nope.
It's common-collector configuration instead of common-emitter. When a PNP is used as a saturated switch, you'll usually see it with it's emitter tied to +V. Here, the emitter of the PNP is still "up"; but the signal out is being taken from the emitter instead of the collector.

...and the emitters of Q3 & Q4 are tied together?

Yep.

and when voltage is applied to the bases of Q3 and Q4 (Q5 OFF), Q4 conducts and charges the gate capacitance and Q3 does not conduct, keeping the charge in?

Yes.

then when voltage is removed from the bases of Q3 & Q4 (Q5 OFF), Q3 conducts and allows the gate charge to bleed out?

You missed the part about Q5 being ON. When Q5 turns on, it sinks current from Q3 until the gate charge reaches (Vbe(q3)+Vce(q5).

I thought a transistor (NPN or PNP) needed current at it's base to conduct.

It does. If Q5 is off, current is supplied by R8. If Q5 is on, current is sunk via Q5's collector. R10 keeps Q5 from becoming deeply saturated.

When a PNP is used upside down, it acts like a NPN except it conducts with no current at the base, and does not conduct when current is at the base?

It's not being used upside-down. Don't get confused now.