to reduce state tables in asynchronous circuit

Discussion in 'Homework Help' started by vvkannan, Oct 24, 2008.

  1. vvkannan

    Thread Starter Active Member

    Aug 9, 2008
    In asynchronous sequential circuits i cant understand how to reduce the state table from the merger diagram .I find it difficult to predict which states are to be merged in the state table seeing the merger diagramCould anybody help me?is there any good site to learn this ?(because i think it would be difficult to explain that here)