timing diagram for IN 50

Discussion in 'Programmer's Corner' started by swty_todd, Aug 1, 2009.

  1. swty_todd

    Thread Starter Active Member

    Aug 3, 2008
    We have just started learning timing diagrams for 8085.
    I just wanted someone to confirm that the third cycle that I have drawn for IN 50 is correct. I am placing the opcode at memory location 7000. I just wanted to confirm whether i have written the device address 50 at the right place at A8-A15 & AD0-AD1 in the third Tcycle. Thanks