# Thermal design: my C/W of my heat sink needs to be negative #?

#### strantor

Joined Oct 3, 2010
6,778
Ok, So I'm calculating what size heat sink I will need. I got the formula here.

Where
Tj = Maximum semiconductor junction temperature
θjc = Thermal resistance, junction to case.
Tc = Case temperature
θcs = Thermal resistance, case to heatsink (see Hot Tips)
Ts = Heatsink temperature
θsa = Thermal resistance, heatsink to ambient.
Ta = Ambient temperature

values:
Tj = 120C
Ta = 50C
Q = 216W
θjc = .402
θcs = .25 (conservative estimate, based on seeing 1C/W when no thermal paste used, and seeing .09 when good thermal paste used)

I get
-0.328C/W

Does that mean I did something wrong, or that I need to pump liquid nitrogen through my heat sink (or would water suffice?), or that what I want is impossible?

Last edited:

#### R!f@@

Joined Apr 2, 2009
9,916
Welcome to the real world.
Use my approach.

Find the biggest sink you can get ur hands on or the one you can fit what ever space you want it to fit tightly and put a fan.
Never fails.

#### colinb

Joined Jun 15, 2011
351
Your conditions are impossible to meet. Think about the limiting case of the ideal heat sink: Even if the heat sink had zero thermal resistance, heat must be conducted through the junction-case and case-sink regions, so $$\theta_{jc} + \theta_{cs}$$ defines your best possible result.

You are right, if you actively cool the heat sink then it could be possible, but then this equation would not be sufficient to calculate it.

#### strantor

Joined Oct 3, 2010
6,778
Welcome to the real world.
Use my approach.

Find the biggest sink you can get ur hands on or the one you can fit what ever space you want it to fit tightly and put a fan.
Never fails.
Man I hope you're right, that liquid nitrogen is expensive

#### strantor

Joined Oct 3, 2010
6,778
Your conditions are impossible to meet. Think about the limiting case of the ideal heat sink: Even if the heat sink had zero thermal resistance, heat must be conducted through the junction-case and case-sink regions, so $$\theta_{jc} + \theta_{cs}$$ defines your best possible result.

You are right, if you actively cool the heat sink then it could be possible, but then this equation would not be sufficient to calculate it.
so.. .402 + .25 = .652 * 216W = 140C is the coolest I could keep the junction if I submerged the MOSFET in liquid nitrogen (for example)

#### colinb

Joined Jun 15, 2011
351
Welcome to the real world.
Use my approach.

Find the biggest sink you can get ur hands on or the one you can fit what ever space you want it to fit tightly and put a fan.
Never fails.
Unless I'm mistaken, even a fan with heat sink cannot achieve this given the conditions. Consider that $$\frac{70\textrm{ deg C (max rise)}}{216\textrm{ W}} = 0.324\textrm{ deg C/W}$$. Now, if the case-sink resistance could be decreased from 0.25 °C/W, to less than 0.078 °C/W, then it might be feasible.

#### colinb

Joined Jun 15, 2011
351
so.. .402 + .25 = .652 * 216W = 140C is the coolest I could keep the junction if I submerged the MOSFET in liquid nitrogen (for example)
No, you could keep it much colder then with active cooling. My limited thermodynamics knowledge prevents me from giving you a more precise answer off the top of my head.

#### strantor

Joined Oct 3, 2010
6,778
So, by active cooling you mean, to lower the ambient? I have created a spreadsheet which does these calculations for me and I've been playing around with the numbers. If I could lower the θcs to .08 (good thermal paste) and the ambient to 15C, I start getting back into the positive numbers. But even with water cooling and a radiator (assuming this is outdoors ambien, summertime in Texas, 40C outside) I beleive the coolest I could get the water is 40C, but I'm not sure how a radiator works (can it make the water cooler than ambient?). maybe a peltier device? how well do those work?

#### R!f@@

Joined Apr 2, 2009
9,916
U guys are at 40 deg Celsius during the day time?

#### strantor

Joined Oct 3, 2010
6,778
Hello,

http://sound.westhost.com/heatsinks.htm

Bertus
Thanks Bertus. I'm only a few paragraphs into it and I already see an area I've flubbed in my design. I haven't accounted for the linear power derating factor

#### R!f@@

Joined Apr 2, 2009
9,916
so we are living in a breeze.
Max so far I have seen is I think 33 deg C

Joined Dec 26, 2010
2,148
Apparently needing a negative thermal resistance probably means that basically higher rated (quite likely physically bigger) devices are required, which could be operated with a positive thermal path resistance.

Peltiers may not be practical in a high-power mobile situation, as their efficiency is so low so that the cooling system would typically end up having to dissipate a lot more heat than otherwise. This is may be more acceptable in a fixed installation where a low temperature is needed at all costs, and using a higher rated device would not help.

#### strantor

Joined Oct 3, 2010
6,778
Apparently needing a negative thermal resistance probably means that basically higher rated (quite likely physically bigger) devices are required, which could be operated with a positive thermal path resistance.

Peltiers may not be practical in a high-power mobile situation, as their efficiency is so low so that the cooling system would typically end up having to dissipate a lot more heat than otherwise. This is may be more acceptable in a fixed installation where a low temperature is needed at all costs, and using a higher rated device would not help.
Actually, what I'm finding is that the #of watts dissipated per MOSFET decays exponentially with linearly increasing number of MOSFETs, I am thinking I should consider using a ton of cheap little TO-220 FETs instead of these big TO-247 High amp FETs; I could get away with using dinky little heat sinks on them. For example, if I increased the number of FETs to 20, I would only dissipate 2.7W/FET and I could use a 25.4C/W heat sink for each one (or bolt them all to one big heat sink). But then I have to make sure they all turn on & off at the same time. Do you think if I went this route and used a dedicated driver for each FET, that I would have a problem with the trace inductance of the PWM signal from my micro? It would be hard to make all the traces the same length.

#### colinb

Joined Jun 15, 2011
351
For example, if I increased the number of FETs to 20, I would only dissipate 2.7W/FET and I could use a 25.4C/W heat sink for each one (or bolt them all to one big heat sink). But then I have to make sure they all turn on & off at the same time. Do you think if I went this route and used a dedicated driver for each FET, that I would have a problem with the trace inductance of the PWM signal from my micro? It would be hard to make all the traces the same length.
What is the MOSFET PWM frequency? I think that would factor in somehow, because if the PWM frequency is very low, then slightly slower turn-on wouldn't result in as much heat because the turn-on happens less frequently. Conversely, higher PWM frequency would result in more critical turn-on time.

Joined Dec 26, 2010
2,148
I'm not sure how hard synchronising them would be. I don't know how fast you need to switch them either, but most likely a micro. output would not drive even one large(ish) FET on and off very fast, let alone a whole herd of them. If more than one driver device were required to supply the gate charge in a reasonable time, it might complicate your synchronisation issues.

Remember also that the probability of encountering a failure - quite possibly a drain to source or gate to channel short - would increase with the number of devices. One short-circuit device might conceivably blow open again, but quite possibly there would be a domino effect, particularly if a gate broke down.

I've had limited SMPS experience myself, but enough to teach me that these things must be treated with serious respect.

#### strantor

Joined Oct 3, 2010
6,778
What is the MOSFET PWM frequency? I think that would factor in somehow, because if the PWM frequency is very low, then slightly slower turn-on wouldn't result in as much heat because the turn-on happens less frequently. Conversely, higher PWM frequency would result in more critical turn-on time.
The switching frequency I'm using is 20KHz. Surprisingly, even that high, my dissipation due to switching losses (calculated, of cours, I haven't built anything yet) are negligible. Here is the table from my spreadsheet, I have calculated :

You will see that by increasing the switching frequency by a factor of 10 only decreases the overall efficiency by .2%. This is due I think to the very fast switching time.

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#### strantor

Joined Oct 3, 2010
6,778
I'm not sure how hard synchronising them would be. I don't know how fast you need to switch them either, but most likely a micro. output would not drive even one large(ish) FET on and off very fast, let alone a whole herd of them. If more than one driver device were required to supply the gate charge in a reasonable time, it might complicate your synchronisation issues.

Remember also that the probability of encountering a failure - quite possibly a drain to source or gate to channel short - would increase with the number of devices. One short-circuit device might conceivably blow open again, but quite possibly there would be a domino effect, particularly if a gate broke down.

I've had limited SMPS experience myself, but enough to teach me that these things must be treated with serious respect.
"How fast do I need to switch them" - A question I have searched and searched the answer, not found. I assume that there is some thumb rule like "switching time should not account for more than X% of one wave period" But have not found such a thumb rule. So my shotgun answer is to make the switching time as fast as possibly conceivable, and I shouldn't have any problems. That's why I have chosen the driver with the highest output current on the market (that I can find, FAN3121, 11.4A output), and chosen a gate resistor the largest value that will allow all 11.4A to pass (at 18V) 1.5Ω. this gives me a theoretical switching time of 17.5nS.

So you're saying that using a seperate driver for each MOSFET will increase the likelihood of the MOSFETs not switching at the same time? Because I've been told repeatedly that trying to use one driver to drive multiple MOSFETs causes (due to different track lengths, and different inducances/resistances) the MOSFETs to switch possibly at all kinds of random times. When I inquired to those replies, asking if using a seperate drivers for each MOSFET was a better solution, the answers were less forthcoming, but the idea that I got was that the answer is probably yes.