Hi, I basically finished my first semester back at school. THink i did pretty good for an old dog. Anyways, one of the topics that was interesting that came up in Digital Systems was SR Latch, but because the semester was pretty much closed it got barely any time, I mean almost no time. The book for the course does a pretty piss poor job of covering it and the few mentions of it only I found were not much better.

Does anyone know of a few example problems that go through step by step on how to solve it? Thanks. Im not in a big rush, just wanted to learn this and flip flops over the next months break.

kirit

 

Here is a link to the AAC ebook section on the S/R Latch circuit.

An S/R latch can be formed from NOR gates or NAND gates.

hgmjr

 

Hi hgmjr, Ive actually read that and the 2-3 pages after that one. I even looked through the worksheets, but still am confused about them. What I was hoping for was a problem description and then showing how to make the proper truth tables to design the circuitry. Ive found many places that talk about SR latches but really dont show how to go from a description to the circuit. Am I asking for too much? I tend to learn more from going through examples.

 

Can you describe what aspect of the S-R latch that you are having a problem understanding?

hgmjr

 

I guess Id have to say a lack in confidence in implementing it. Can you think of a problem that I might try out, that way you can check if i have the concept down. thanks.

 

Are you aware that a S-R Latch can be made out of 2 NOR gates or you can make one out of 2 NAND gates?

hgmjr

 

Does this wikipedia link help any?

hgmjr

 

Grab a CD4043 or 4044 (and the data sheets) and experiment. A SPDT switch plus 2 47K resistors will be handy.