Hi
i am driving a buzzer (4khz+/500hz) 5Vp-p. using a square wave generator.
The circuit diagram and datasheet of the NAND gate used is attached.
Is this a correct circuit???
I have implemented a control input tooo.....
I also need a duty cycle of 50%.
I tried simulating in pspice but the input to NAND gate U6D climbs near 6V and fallls below -3V. Though the input volt is tolerant to 7V I am not sure whether this is a standard technique.... Do i need to add a resistance to U6D feed back input.....
Also the NAND gate input has ESD protection diode implemented, so will this not clip the -ve rail run (-3V) trigger.
Please help me to develop a proper circuit. If the circuit designed is functional please tell me whether the 50 duty cycle be met.
i am driving a buzzer (4khz+/500hz) 5Vp-p. using a square wave generator.
The circuit diagram and datasheet of the NAND gate used is attached.
Is this a correct circuit???
I have implemented a control input tooo.....
I also need a duty cycle of 50%.
I tried simulating in pspice but the input to NAND gate U6D climbs near 6V and fallls below -3V. Though the input volt is tolerant to 7V I am not sure whether this is a standard technique.... Do i need to add a resistance to U6D feed back input.....
Also the NAND gate input has ESD protection diode implemented, so will this not clip the -ve rail run (-3V) trigger.
Please help me to develop a proper circuit. If the circuit designed is functional please tell me whether the 50 duty cycle be met.
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