Hello guys,

I am trying to model the input of a select pin for a switch. The input is a 'nothing more' than a CMOS inverter.
What I have done so far is change the threshold voltages for the PMOS and NMOS to match VIH and VIL in the datasheet for the respective supply voltage. For example, VIH for 3.3V is 1.4V MIN so in the PMOS model I changed the threshold to -1.4V. VIL is 0.4V MAX so in the NMOS model I changed the threshold to 0.4V.
From the simulation I did it am getting something similar to the Icc. vs. Vin curves. Meaning my current spike is roughly around 1V as per the datasheet's figure but the current is off by orders of magnitude. The datasheet states uA when Vin is between VIH and VIL, but I am measuring amperes!
Any thoughts on what I can change in the model to reflect the datasheet curve? I am using TINA, Spice Level 3 models.

 

The Pspice default device geometry (channel length and width) is probably orders of magnitude larger than the devices in logic gates. ON resistance is proportional to L/W. For a given L/W ratio, the actual values of L and W will affect primarily device capacitances.
Can't you find a mfr's model for your device?

 

The only semiconductor manufacturer that have spice models for switches was Analog Devices. The device I am using is an ON Semi device.

BTW, I am playing around with the widths and lengths as you mentioned and used some values from here. I am in the uA now. Good advice!

Ahh, but it also pushes out the Icc curve to be maximum at 1.2V instead of ~1V.