SPI - SDI pin really available?

Thread Starter

atferrari

Joined Jan 6, 2004
4,764
DOUBT SOLVED: see my last post below

PIC 18F family - Assembler.

I implemented the addressing / data buses to write / read an EEPROM using a string of 74HC595 shift registers. It worked OK.

When implemented a more "adult" version with just IO pins from a 18F4520, started to get massive (but consistent) errors.

Since I peek at the data through a 74HC595 shift register driven by the SPI module (Master mode), I need to discard this doubt:

Is the SDI pin really available to me? If so, just as an output, right?

After burning my last 18F4520 (yes, I still do things like that) I am going back to the 18F452 (have plenty around).

Please read the excerpt from its datasheet (same wording as for the the late 18F4520).

Just in case, while I know that the /SS TRIS position is WRONG, that pin is not relevant here because the SPI is Master.

Any comment appreciated.
 

Attachments

Last edited:

spinnaker

Joined Oct 29, 2009
7,830
SDI is the input pin for SPI. You would need to set your TRIS bit for that pin as input. You should also be sure to set it as a binary input if can also be an analog input pin.


You should also have a SDO pin you would need to set the TRIS for that pin to output,

These pins are not interchangeable unless (if memory serves) they are also programmable function pins.
 

JohnInTX

Joined Jun 26, 2012
4,787
Is the SDI pin really available to me? If so, just as an output, right?
Well I confess I never really considered that last part you circled. Like spinnaker, I just do SPI or not. BUT, the datasheet says it should work.. maybe.

First, do you have the latest datasheet? Mine is Rev E but that may not be the latest. I say that because the section you refer is in chapter 17 in mine, not 15. So be sure you have the latest one.

Second, get ALL of the errata for your particular silicon version. The errata for A1 silicon has this little gem:

Module: MSSP
When the MSSP is configured for SPI Master
mode, the SDO pin cannot be disabled by setting
the TRISC<5> bit. The SDO pin always outputs
the content of SSPBUF regardless of the state of
the TRIS bit.
In Slave mode with Slave Select enabled,
SSPM3:SSPM0 = 0010 (SSPCON1<3:0>), the
SDO pin can be disabled by placing a logic high
level on the SS pin (RA5).
That doesn't address your SDI question but says that there have been some similar problems in the area. (It looks like it was cleared up in the Rev Bx silicon). And unfortunately, there have been LOTS of issues with the MSSP for lots of parts... Remember: The datasheet giveth - the errata taketh away. And as one who over the years has identified a couple of issues that have been later enshrined in errata, my advice is to move the pin.

BTW, your programmer should report the silicon version.
EDIT: If after all of this, you think it should work open a support ticket at microchip.com. Not all known problems get to the errata before you encounter them. If you are misunderstanding something, they will work to clear it up. They really do try to fix problems.

Good luck!
 
Last edited:

Thread Starter

atferrari

Joined Jan 6, 2004
4,764
Besides possible errata, I understand that I should be able to use it as an output. Anyway, for the moment I keep the SDI pin, NC.

Thanks for the replies.
 

THE_RB

Joined Feb 11, 2008
5,438
Does the datasheet section on ports show the logic gate diagram for that port pin? The better datasheets always used to show that.

If it does, that will show you if TRISx over-rides the other functions and can force the pin to be an output.
 

Thread Starter

atferrari

Joined Jan 6, 2004
4,764
Does the datasheet section on ports show the logic gate diagram for that port pin? The better datasheets always used to show that.

If it does, that will show you if TRISx over-rides the other functions and can force the pin to be an output.
Not specific for THAT one. It is generic for any pin.

After thinking of it I presume that I should be able to have it available as OUT pin, otherwise it is automatically IN (and acting as SDI for the peripheric, SPI in this case).

Still wondering why peripherics' pins are "scattered" all over and there isn't at least one single port which is pure IN/OUT.

Thanks to you all for replying.
 

spinnaker

Joined Oct 29, 2009
7,830
Not specific for THAT one. It is generic for any pin.

After thinking of it I presume that I should be able to have it available as OUT pin, otherwise it is automatically IN (and acting as SDI for the peripheric, SPI in this case).

Still wondering why peripherics' pins are "scattered" all over and there isn't at least one single port which is pure IN/OUT.

Thanks to you all for replying.

I don't understand your complaint. Are you complaining that pins do more than binary i/o? I for one am glad of that.
 

Thread Starter

atferrari

Joined Jan 6, 2004
4,764
I say that I would like to see at least one of the ports uncomitted to peripherics, just plain IO to avoid changing port selection when a peripheric enter/leaves the game during design.

Yes, higher families have configurable ones. Would like to have that, all neatly ranged where I need them...!
 

spinnaker

Joined Oct 29, 2009
7,830
I say that I would like to see at least one of the ports uncomitted to peripherics, just plain IO to avoid changing port selection when a peripheric enter/leaves the game during design.

Yes, higher families have configurable ones. Would like to have that, all neatly ranged where I need them...!
I would like to see port pins lined up. Often they are not but I understand why that might be difficult especially when dealing with various types of packaging.
 

Thread Starter

atferrari

Joined Jan 6, 2004
4,764
Now that my design seems to be bug-free, :rolleyes: I made a proper test with SPI in action.

Doubt solved.

As the datasheet allows to presume, if I make TRISC,4 =0, when SSPCON1,SSPEN =1, the pin IS available as an output.

Thanks to you all for replying.
 
Last edited:

Gorgon

Joined Aug 14, 2005
113
Even if the SDI pin is working as an output, it could still be that the value of the pin is used in the SPI engine. Since you don't use the input, it is of no actual interest. From the text in the datasheet, it looks like the 'input' from the SDI pin is fixed in the SPI engine.
 
Top