I have a couple of theory questions that I seem to not understand, please correct if this is true or not

1. Bit banging refers to repeatedly sending the same bit until the slave sends an acknowledgment that it has recieved the bit

2. Between Parallel, Asynchrounous Serial, and Synchrounous Serial, which has a maximum potential data transmission rate capability?

3. In i2c why do the data and clock lines require a pull up resistor?
To minimize noise

So that no device needs to drive a line high.

Inline resistors are neeed to match devices of different voltage levels.

I2C does not require pull up resistors.

I am guessing for no.3 above everything is true except for the last.. is this true?

4. Which of the following are valid state names+ descriptions for i2c?
Start Clock High , sda: High->low

Stop Clock High, sda-> High->low

Repeated Stop: Clock High, SDA Low->High

Ack Clock High data pulled low by slave

Data Valid, clock high, data high or low

 

This sounds a great deal like an assignment. What are your answers?

 

False, True, True, False, False, True, False, False.

However, those answers are not in the same order as the questions above.

As Beenthere queried, please state how much you know about each one, and why your answer is True or False, in addition to simply True or False.

 

My current answer:

1. True
2. Parallel, Asynchrounous, and Synchrounous (highest to lowest)
3. Everything is true besides the last one
4. Everything correct except Repeated Stop: Clock High, SDA Low->High

 

Offhand I have no idea on Q4, but I believe you have a long way to go on the rest, sorry..

 

so not even a single help? hints?

 

Heres what Wiki says about bit banging

1. Bit-banging is a technique for serial communications using software instead of dedicated hardware. Software directly sets and samples the state of pins on the microcontroller, and is responsible for all parameters of the signal: timing, levels, synchronization, etc. In contrast to bit-banging, dedicated hardware (such as a modem, UART, or shift register) handles these parameters and provides a (buffered) data interface in other systems, so software is not subject to the requirements signal demodulation. Bit-banging can be implemented at very low cost, and is used in, for example, embedded systems.
Although it is often considered to be something of a hack, bit-banging does allow the same device to use different protocols with minimal or no hardware changes required.
With a few extra components, video signals can be output from digital pins. (See TV Typewriter).
There are some problems with bit-banging. The software emulation process consumes more processing power than does supporting dedicated hardware. The microcontroller spends much of its time reading or sending samples to and from the pin, at the expense of other tasks. The signal produced normally has more jitter or glitches, especially if the processor is also executing other tasks while communicating. However, if the bit-banging software is hardware interrupt-driven by the signal, this may be of minor importance.

2. SPI - 10 Mbit/s
I2C - 1 Mbit/s
UART1 - 500 kbit/s

 

so I am guessing the fact about bit banging is false? it's totally out of it's league...

I am guessing parallel comes fastest, followed by synchrounous, and then async