I am trying to make a 3x8 encoder with the additional feature of keeping the old value in the output when all the input are 0.

Truth table:

Inputs...............................Outputs
I7| I6| I5| I4| I3| I2| I1| I0|O0|O1|O2|
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |O0|O1|O2| <<<<<< O0, O1, O2 are the previous outputs
0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 |
0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |
0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 |
1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 |


It's obvious you must implement d flip flops or d latches inside the encoder, but the way I thought did not work.

Thanks for any help~

 

I am trying to make a 3x8 encoder with the additional feature of keeping the old value in the output when all the input are 0.

Truth table:

Inputs...............................Outputs
I7| I6| I5| I4| I3| I2| I1| I0|O0|O1|O2|
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |O0|O1|O2| <<<<<< O0, O1, O2 are the previous outputs
0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 |
0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |
0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 |
1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 |


It's obvious you must implement d flip flops or d latches inside the encoder, but the way I thought did not work.

Thanks for any help~

You should be able to do this with any encoder. (e.g. 74148)

In order to save the previous state when all the inputs are 0, simply create a logic function that will activate the chip enable when all the inputs are not 0. Thus, when all inputs are 0, the chip will not be enabled, and the output won't change.

 

Thanks for the reply,
Unfortunately I need the 1st part of the circuit to stay on and the 2nd part to freeze (while the clock still controls a counter in the 2nd part) So I pretty much just want inside the encoder to hold the previous value when all are zero.

 

Late anwser, but what can you do? Vacations come first.

I don't get what you mean by first and second parts of the circuit. What jegues proposes unfortunately can't be implemented, as I see it. In the datasheets I have looked at, the enable input will reset the encoder output or set it to high impedance, instead of holding its value, so that won't work.

A latch after the encoder output is a solution. I will be loaded when any of the inputs are 1 and will be "frozen" when all of the inputs are 0. I would test it carefully though, because if you need too many logic gates to decide whether you should load or freeze the latch, the encoder might have time to produce a new output in that time.