I have a SB Audigy card that has a digital SPDIF output pins on the AUD_EXT header and I want to use that to connect to my speakers which have a digital coaxial jack. The cabling is a non-issue, but I will need to make a small op-amp circuit to attenuate the 0-5V TTL to -0.5V to +0.5 coaxial customary levels. I will be base my work off of the example on the following page: http://www.andrewkilpatrick.org/mind/spdif/ (scroll about half way down)
I'm just curious why do I need the combined current output from the 3 driving op-amps. My guess is that it has to do something with the 75-ohm impedance of the transmission line (coax). I'm not afraid of math, physics or electrical engineering so feel free to be as technical as you need to be in order to explain this clearly. Thanks.

 

Those aren't opamps. They're inverters. And you are sharing the load.

 

Look up a data sheet for a 74HC04. They are TTL (although CMOS technology) inverters. There are three in parallel to handle the needed drive current through the capacitive load in the coax. Just make sure the 5 volts is accurately regulated. If you can scare up some old SN7404 (real TTL) inverters, they can probably handle the current better. Tie up unused inputs to +5 through a 4700 ohm resistor.

 

They are probably going to an RS-422 differential receiver so the actual levels don't mean anything. 0-5V is just as good as -0.5 to + 0.5. It is the resitive divider and the AC coupling that gets you the levels you are talking about. The DC current is not for the load of the cable but to charge and discharge the coupling capacitor.

I think the real TTL part will work like crap because a TTL output is a great current sink, but can't source any appreciable current worth a damn. Falling edges will look sharp but the rising edges will be really sloppy. For symmetrical drive and more current use a 74AC04.

 

Sounds good. Thanks a lot guys.

 

You don't want to use the TTL inverters, but rather the HC04's as the schematic shows.

As a general rule, you don't parallel bjts (which is what TTL outputs have). They have a nasty habit of giving all the current to only one of the parts instead of spreading it around.

HC04's are High-speed CMOS. So they are FETs which will share the current.

 

Caveman brings up a great point.
CMOS devices are a snap to parallel because they have a positive temperature coefficient; as they get warmer, they get more resistive. So, when they get hot, they conduct less, and devices in parallel "take up the slack".

But take a look at the hFE plot in the datasheet for any BJT. You'll see the gain radically increases as the temperature increases, which leads to "thermal runaway" when paralleling them.