Due to a manufacturing error, a parasitic resistance (Rp=9kohms) has appeared in the CMOS inverter of Figure 1. Find the output voltage when Vin=0V, verifying the region of operation of the device.
Given: Vdd=1.8V; kn'=100uA/V^2; kp'= 50uA/V^2; lambda=0 for both devices
Mp: Vt=-0.5; W/L=5/0.18
Mn: Vt=0.4; W/L=3/0.18


Attempts: I know NMOS must be in cutoff and that Imp = Imn = 0. PMOS is conducting because Vgs<Vt. I believe that PMOS is in saturation because Vds (which should be equal to zero) > Vgs-Vt (which is -1.8-(-0.5)=-1.3). I know that if the resistor was not there, Vout=Vdd, but I am very confused about how the resistance will change Vout. When I simulated the circuit it gave Vout a value of 1.2V, but I do not know how to solve for that.
Any help would be very appreciated!

 

Hint: Voltage divider.

 

Sorry I'm still confused. I only have one resistor so I'm not sure how to do voltage division.

 

Don't your FETs have a channel resistance when they are turned on?

 

Sorry I'm still confused. I only have one resistor so I'm not sure how to do voltage division.

You said the device had a parasitic 9k resistance, so you have that resistor and the output load resistor.

 

You said the device had a parasitic 9k resistance, so you have that resistor and the output load resistor.

The output load resistor is unspecified. I thought it was the resistor shown in the schematic, too. But it turns out that that IS the parasitic resistance, Rp, that the problem was talking about.

 

The output load resistor is unspecified. I thought it was the resistor shown in the schematic, too. But it turns out that that IS the parasitic resistance, Rp, that the problem was talking about.

You're right, I missed that.
So the output ON resistance has to be calculated from the given transistor parameters.

 

You're right, I missed that.
So the output ON resistance has to be calculated from the given transistor parameters.

That's my take, too.

@Mary Kate : Do you have what you need to go forth?