Project goal: safely charge and discharge three NiMH cells (1.2 V, 2300 mAh nominal) in series.
Approach: use two comparators to isolate batteries from the load and from the charging source when overvoltage and undervoltage conditions are reached.
Request: Please look at my schematic, simulation traces in LTSpice IV, and PCB design and tell me if there's anything wrong (let me know if you need more info about the names of traces on the simulation). I'm almost ready to submit this for manufacture. I'm most worried about the trace width and clearances on the PCB (assuming the schematic works). As for I/O to the board, I'm thinking of using mechanical connectors such as those screw-in metal things to secure the threaded wire (to be placed where the X'ed holes are).
Attachments: 1) schematic, 2) board 3) simulation in LTSpice IV 4) traces from simulation 5) close-up of hysteresis in low-voltage cutoff from simulation 6) datasheet for p-channel FET.
Operation: Battery cell voltage approximated with voltage divider through R1 and R2, which divides the battery pack voltage by three. This voltage is input to two comparators in dual package, LM393. The other input is a 1.0 V reference voltage produced by a shunt precision reference, ADR510. The high-voltage cutoff is on the left. It compares the reference and the cell voltage multiplied by about 2/3 through R4 and R5 since the high-voltage cutoff is about 1.45 V and 1/1.45 = 20/29 ≈ 2/3. When the cell voltage through this voltage divider rises above 1.0 V, the comparator's output is pulled to the battery pack voltage through pull-up resistor R6, which turns off the p-channel FET, isolating the batteries from charging.
Likewise, the low-voltage cutoff on the left compares the cell voltage to the reference of 1.0 V, because the low-voltage cutoff is 1.0 V. When the cell voltage drops below 1.0 V, the output of the comparator is pulled to the battery pack voltage through pull-up resistor R7, isolating the battery pack from the discharging load. There is hysteresis on the output of the low-voltage comparator to prevent flickering of the LED load.
Approach: use two comparators to isolate batteries from the load and from the charging source when overvoltage and undervoltage conditions are reached.
Request: Please look at my schematic, simulation traces in LTSpice IV, and PCB design and tell me if there's anything wrong (let me know if you need more info about the names of traces on the simulation). I'm almost ready to submit this for manufacture. I'm most worried about the trace width and clearances on the PCB (assuming the schematic works). As for I/O to the board, I'm thinking of using mechanical connectors such as those screw-in metal things to secure the threaded wire (to be placed where the X'ed holes are).
Attachments: 1) schematic, 2) board 3) simulation in LTSpice IV 4) traces from simulation 5) close-up of hysteresis in low-voltage cutoff from simulation 6) datasheet for p-channel FET.
Operation: Battery cell voltage approximated with voltage divider through R1 and R2, which divides the battery pack voltage by three. This voltage is input to two comparators in dual package, LM393. The other input is a 1.0 V reference voltage produced by a shunt precision reference, ADR510. The high-voltage cutoff is on the left. It compares the reference and the cell voltage multiplied by about 2/3 through R4 and R5 since the high-voltage cutoff is about 1.45 V and 1/1.45 = 20/29 ≈ 2/3. When the cell voltage through this voltage divider rises above 1.0 V, the comparator's output is pulled to the battery pack voltage through pull-up resistor R6, which turns off the p-channel FET, isolating the batteries from charging.
Likewise, the low-voltage cutoff on the left compares the cell voltage to the reference of 1.0 V, because the low-voltage cutoff is 1.0 V. When the cell voltage drops below 1.0 V, the output of the comparator is pulled to the battery pack voltage through pull-up resistor R7, isolating the battery pack from the discharging load. There is hysteresis on the output of the low-voltage comparator to prevent flickering of the LED load.
Attachments
-
13.8 KB Views: 126
-
42.7 KB Views: 117
-
30.3 KB Views: 91
-
22 KB Views: 70
-
173.6 KB Views: 118
-
11.7 KB Views: 23