What are the multiple pads for in this capacitor?
Is it just to minimize inductance in the solder joints by having four of them on each side? Is it a package with multiple capacitors in it? How should it be applied? I looked at the datasheet, but I still don't know.

http://www.digikey.ca/product-detail/en/LLA219R71C104MA01L/490-4414-6-ND/1531720

 

lower ESR and inductance

 

I am curious about this too... how do the multiple pads contribute to low ESR and Inductance.

 

Because the silicon chip is large, and a cap on one side could only be connected to the other side of the chip by thin traces within the silicon. So the little doodads on the other side of the silicon get poor capacitizing.

If you put caps on both sides (or all 4 sides) of the silicon chip the caps are closer to all the little doodads on the chip.

 

not sure i got it, but will study this in details when i find time. Thanks for explaining.

 

I think I'm in love. A capacitor with 4 pairs of connections!
4 inductors in parallel have less impedance, like 4 resistors in parallel. Great way to get lots of conduction in a small space

 

I think I'm in love. A capacitor with 4 pairs of connections!
4 inductors in parallel have less impedance, like 4 resistors in parallel. Great way to get lots of conduction in a small space

Then you will like the one with 10 pads (2 are on the ends).
Their explanations are on pages 148 and 152 of the datasheet. Odd numbered pads are one terminal of the capacitor, even pads the other.

 

I think I'm in love. A capacitor with 4 pairs of connections!
4 inductors in parallel have less impedance, like 4 resistors in parallel. Great way to get lots of conduction in a small space

Hahaha! I just realised that I was the only person in this thread talking about why an IC (silicon chip) has multiple pads to connect to multiple capacitors!

Face palm moment.