A logic circuit has 5 inputs: A*, B, C*, D*, E and one output Y. The ouput Y is asserted if one or more of the following conditions occurs:

. A*, C* and E are all asserted

. B is asserted but neither A* nor D*is asserted

. B is negated but D* or E is asserted

Using suitable logic symbols, draw a clearly labelled logic circuit diagram to illustrate the circuits's behaviour.

The B* asserted , A asserted is confusing me. Thanks