Hi everyone,

I'm not sure if most people know or not, but most of my postings are related to a single project that I have been working on. I wanted to see if someone can suggest a bypass capacitor to use for my circuit. The OUT1 and OUT2 go to a 0.8 Ohm 50mH inductance. It is being PWM switched at around 50KHz, but I may go up to 100KHz. The on-resistance of the FETs in the bridge are 0.15 Ohms nominal.

The sense resistors each go into their own differential low-pass filters with a cutoff of about 15KHz. I'm planning to sample the ADC at 30KHz. These differential amplifiers go directly into an instrumentation amplifier with selectable gain between 5 and 10. These should provide the actual current value in volts because I choose a 0.1 Ohm sense resistor. The gain of 5 is when the bridge is in slow-decay mode, which I would normally get twice the current shown. I'm using a simple logic circuit within the FPGA (not shown) to control this. I have supply filters on the opamps to reduce noise, I chose the cutoff to be around 10KHz, which is where the PSRR to frequency starts to really dip for both the instrumentation amp and the opamp. The TBD cap is a really small capacitance to eliminate the sense resistor spike when the h-bridge changes state.

Any red flags? Can someone make a suggestion? I'm going to check this over with a professor and it will be final lest anyone speaks from here.

Kindest regards,

Steve

 

EN input -

I take it back; they ARE Schmitt inputs. Took a bit to find it.

 

Wow! Either nobody cares, or it looks good

Just gotta get the okay from my professor and we will see how it materializes..

Steve

 

Oh, is it possible for anyone to recommend a capacitor that is suitable for this??

Steve

 

You should have a combination of a larger bulk capacitance and some ceramics. 100uF + (2 to 4) 100nF X7R 50V should be enough. If you expect a lot of ripple through the Al-Electrolytic then you can add some tantalums 4.7uF to 10uF in parallel.

You should also add some ceramics on the AD8675 (and other ICs) 100nF X7R to be placed right next to the pin when you lay them out.

 

Nanovate,

Thanks, I just realized that I skimped out on the small value capacitors. I will surely add them in

I still don't quite understand how to calculate an appropriate cap. value for the h-bridge circuit, but I think I have a book somewhere that details how to find the right values. I just realized I made a mistake R19 should be on the other side of the 5V , whoops..

Steve

 

Sorry Steve, I started looking at it, but I have a lot on my plate at the moment.

I agree with Nanovate on the 100nF ceramics/tants; you'll need 'em to supress the HF transients. Put the smallest caps in the shortest path from the Vcc/Vdd pins to ground as you possibly can.

Rule of thumb for electrolytics is use 2x the expected voltage. Somewhere between 100nF and 1uF sounds about right for a bootstrap cap. You wouldn't want it to be much larger than that, because it would take a while for the charge pump to build the charge.

You're missing the ground on SENSE_B, below R9.

Are you just going to leave the unused leads open for the AD8675's? You may find it very convenient to have some dummy resistor networks in there just in case you have to do some trimming. Options are nice. Sure beats drilling more holes and running jumpers. Ask me how I know this.

On U5, you might want to have a 100nF cap on pin 3 to eliminate resistor noise. Bypass caps on +5 are needed on pin 2, too.

Your C8 and C9 TBDs concern me a bit. I think your idea is to supress spikes, but unless the caps are very small (well under 1nF) you'll start getting skew, or phase delay.

You're putting reverse EMF protection diodes across the coils, right? You should also put small caps (around 470pF) in parallel with those diodes to absorb the EMF until they can start conducting.

 

Hi Wook,

Thanks a lot for checking it out! I made a lot of silly mistakes on this schematic and will have a new one soon, it's a bit embarrassing. I need to render it a bit better, since the PGND was showing in my schematic. The AD8675 is going to the FPGA, which I didn't show. You're 100% right about trimming resistor addition, I'm thinking of adding in some pots for offset adjustment. It's just the fact that I have 8 of these channels to make, so I am trying to be conservative.

I'm not really sure where to start with the EMF protection or how it can hinder operation. I am meeting with an expert in these things on Wednesday, so hopefully he can make a recommendation. I am off to an exam, I will look at this more closely later on.

Steve

 

If I hadn't found at least a few mistakes, I would think I wasn't looking hard enough

Steve, have a read on this document:
"The Bypass Capacitor in High-Speed Environments"
http://focus.ti.com/general/docs/techdocsabstract.tsp?abstractName=scba007a

It's older, but still relevant to what you're doing.

Trim pots can get expensive, and they can get noisy or get out of adjustments, too.
Usually I'd do a select-on-test deal with that; just wire in a trim pot temporarily, tweak it up, measure the pot, and solder things in place. You won't have to worry about inductance and real estate so much if you use thick-film SMT's.

The 1206 series aren't too hard to work with. 0603 series are a PITA; makes me feel like I'm trying to solder an ant using a telephone pole. Try to leave yourself enough room for parallel resistor networks for trimming, as even the E192 series doesn't have all the possible values you might need. With three resistors in parallel even in the 10K range you can get accuracy under an ohm using E24 series. Don't forget a 10nF bypass cap right off the bias trip pins to ground to knock down the resistor noise. Doesn't have to be much.

 

Steve, how come the resistor values around your two op amps are different? Is that a remnant of testing different configurations, and forgetting to update the other side, or is it intentional?

 

Ron H,
I think they're actually all 1K, but it's kind of hard to tell with the reference designators train-wrecked into the values.

Steve, you gotta keep 'em separated!
I usually put the ref des on top, and the value on the bottom, space permitting.

The op amp signals are another place to consider using parallel resistor networks, if accuracy is important to you. Of course, the accuracy of the whole thing starts off with how close the sense resistor (and it's signal path) actually is to 0.1 Ohm, and if not, do you have provisions in place to compensate for that.

As things stand right now:
1) It's a given that the sense resistor and signal path will not exactly equal 0.1 Ohms.
2) You have no provisions in place to compensate for that certainty.
3) Individual precision resistors are expensive and have a long procurement lead-time, especially if you have a stock of E24/E48/E96 series resistors on hand.

 

Ron H,
I think they're actually all 1K, but it's kind of hard to tell with the reference designators train-wrecked into the values.

Sarge, is it possible that you haven't noticed that your mouse cursor turns into a little magnifying glass when you are on the schematic? If it has a "+" inside it, click and the schematic gets bigger, and more clear. At least, that's how it works for me.

 

Ron H,
Absolutely knew about clicking it to make it larger! It doesn't look good at all unless one DOES click on it to expand it to full size.

An example of what I was talking about is "R181k", below U2, and above C15
That R181k might be interpreted as
R18, 1K
R1, 81K
Or something else entirely, depending upon whether or not they had an ordinary household electron microscope
I think I'm gonna need a new monitor next year anyway - miopia is a drag

 

Sarge, I think I'm slippin'. I should have noticed that.

 

Hello Wook and Ron,

I had an exam yesterday and didn't manage to sleep much, so I was in recovery mode lastnight. Thanks so much for your helpful replies

"As things stand right now:
1) It's a given that the sense resistor and signal path will not exactly equal 0.1 Ohms.
2) You have no provisions in place to compensate for that certainty.
3) Individual precision resistors are expensive and have a long procurement lead-time, especially if you have a stock of E24/E48/E96 series resistors on hand."

You're right about the precision hinging on the sense resistor, which is why I must introduce an offset compensation in the front end opamps. I have no idea how to do this, other than using small potentiometers. The appnote recommends it, so I may give it a go. It doesn't give a full range of compensation, just a few mV. Hopefully it will be enough to make a bit of a difference.

I order through Digikey, so if they don't have it, then I just don't get it They have a lot of precision resistors in stock. Since I am looking for relative precision, then I think that if I buy a bunch of 0.1% resistors, they will be fairly close to one another.

I'm having a really big fundamental issue right now with the design.. It seems that the filter that I wanted to use isn't right for the job. I'm not quite sure what I expected it to do, but for some reason, I thought it would just lower my output as frequencies go high. It does do this, but there is a constant bias of about 1/2 the input voltage. As frequency goes up, I wanted to keep the bias at 1/2 of the output voltage, which doesn't seem feasible. Anyone have any input with this??

Oh yes, I will fix my sloppy refdes placement Sorry about the ambiguity.

Regards,

Steve

P.S. Sorry about the quality of the attached images,, I had to mess with them to keep their size down. I used a similar opamp for simulations, I changed the gain to 5 and the cutoff to about 6.3KHz.

 

Maybe I do want the offset, I guess that would be the DC current flowing through the coil in the end... Sorry, too much school and stuff going on

Steve

 

Yeah, you do want the offset. The filter just takes the "sharp edges" off the HF stuff. It doesn't remove it entirely, but it does tend to average the p-p voltage of the HF components.

Rather than feeding it a sinewave, throw some low-risetime 0v to 200mV square waves through it. I suggest a pulse of 230uS and a time period of 460uS. Since a perfect square wave is the sum of the odd harmonics, you'll better see how the output responds across the various frequencies. I chose 200mV because you have a gain of 5, so that's more convenient to look at, and is well within your example op amp's linear operating region.

Speaking of which... what's the highest current you're expecting to see going through Rsense?

 

Hi Wook,

I tried it with some squarewaves, it looks good You can definitely see how the higher frequency components are cut off. I'm very happy with the way it looks!

I'm expecting about a maximum of 4A. My sense resistors are surface mount in a D2PAK. They're rated for 25W with a heatsink, which is plenty. I didn't want a lot of temperature change, due to it's ability to change the resistance. Unfortunately, I could only afford 1% tolerance, so I hope there is some way to adjust offset enough to compensate.

I ended up paying about 4$ each for them, which would be reasonable if I needed just a few. I had to purchase 16 of them for the 8 channels

Steve

 

Hmmm - 25 Watts is maximum overkill! 3 Watts would still be nearly twice what you needed. Well, they'll be temp stable that's for sure!

If you were really going to nitpick about temp rise, you could epoxy TL431's on top of them, have the MPU monitor the temps and do the offset - or even just use another opamp to take the TL431's output and sum that with the Rsense reading to have automatic temp correction. Perhaps that's overcomplicating things...

 

hehe Wook,

I'm already doing something along that line! Just in case I find that temperature is causing a significant loss in performance, but I highly doubt that it will. There a ton of unused digital IOs for the FPGA, so I guess I don't like wasting them

Steve